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Important General Note:

Export PDF to download, if Libero or SoftConsole revision is changed!

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

Figure template (note: inner scroll ignore/only with drawIO object):

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Export PDF to download, if vivado revision is changed!

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

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Create DrawIO object here: Attention if you copy from other page, use

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Overview

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Notes :

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short description of the design

Short Link of "Scroll only" macro:

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Overview

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Notes :

short description of the design
Short Link of "Scroll only" macro:
- Use short link the Wiki Resource page, for example: http://trenz.org/te0720-info
- List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

This demo is a Webserver which utilizes SmartFusion2 SoC ARM Cortex-M3, Ethernet, USB / COM-port, Real Time Clock and the on-board LEDs.

The demo is offered in two variants, one which is stored into the embedded non-volatile memory (eNVM) and the seconde one which stored to the external DDR3/L SDRAM memory and therefore volatile.

Refer to

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List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

This demo is a Webserver which utilizes SmartFusion2 SoC ARM Cortex-M3, Ethernet, USB / COM-port, Real Time Clock and the on-board LEDs.

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for the current online version of this manual and other available documentation.

Key Features

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Add basic key futures, which can be tested with the design

Excerpt
Libero 12.4 (FPGA IDE) SoftConsole 6.2 (Software IDE) FreeRTOS V7.0.1

Refer to http://trenz.org/tem0002-info for the current online version of this manual and other available documentation.

Key Features

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Notes :

Add basic key futures, which can be tested with the design

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1 (lightweight IP)
ETH
UART
DDR
eNVM
User LED access
Real Time Clock

Revision History

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add every update file on the download
add design changes on description
Datum & Ordnernamen UPDATEN / CHECKEN

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title	Design Revision History

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Date	Libero	Project Built	Authors	Description
2020-11-23	12.4	TEM0002-SmartBerry_

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TEM0002-SmartBerry_Webserver-Demo_Libero-12.4_2020.10.05-1320.zip

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its User Interface
2018-02-26	11.8	Smartberry_Webserver_Demo.zip	--	Initial release

Release Notes and Know Issues

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add known Design issues and general notes for the current revision
do not delete known issue, add fixed version time stamp if issue fixed

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title	Known Issues

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Issues	Description	Workaround/Solution	To be fixed version

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Table_SW
title	Software

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Software	Version	Note
Windows 10	2004 / 19041
Libero Release	12.4
SoftConsole	6.2	Included in the Libero installation
Microsemi Flash Pro 5 module driver	2.10.0.0	Utilize onboard programmer and USB / comport connection. Included in the Libero installation
FTDI Driver for the TEM0002 module	2.12.28.0
UART / COM-port terminal		Capturing the modules messages
Web browser		Optional for the Demo Webserver, an ordinary Web browser (supporting MS-HTML > 6.0)

Hardware

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Notes :

list of hardware which was used to generate the design

Design supports following modules:

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title	Hardware Modules

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Module Model	Board Part Short Name	PCB Revision Support	DDR	embedded SRAM	embedded Flash	Notes
TEM0002-01-010C	SmartBerry	REV01	1 GBit / 128 MB	64 kB	256 kB	NA

Additional hardware Requirements:

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Additional Hardware	Notes
Demo host computer	Demo was created and tested on windows

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Libero Hardware Project
Hardware Reference Design. Setup of MSS, Ethernet, buttons and LED's
SoftConsole Workspace, containing:
    Software Project - Smartberry_HelloWorld_X.y
    Software Project - Smartberry_Webserver_X.y
    Software Project - Smartberry_Webserver_DDR_X.y
    Board configuration file
Manual (This wiki page as PDF)

Design Sources

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Libero / SoftConsole software versions is not recommended.

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Important set new Libero version link on every Design update of new Libero version!
Set Link to download folder (Remove ../de/.. ../en/.. from url) for example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0712/Reference_Design/2018.2/test_board

Reference Designs / Demos are available via the following link:

TEM0002_Reference Designs/Demos

The download is a ZIP compressed archive. Extract the archive before usage.

Design Flow

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Notes :

Basic Design Steps
Add/ Remove project specific description

The

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Board configuration file

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Programming of the Hardware reference Design requires to open the FPGA Design IDE Libero

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anchor	Figure_1
title	Libero GUI "Run PRGORAMM ACTION"

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The Hardware Reference Design can be opened via "Project > Open Project"

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Confirm your selectioin by pressing "Ok" , the dialogue closes, and open The SoftConsole by pressing "Launch"

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title	SoftConsole "Select the Workspace"

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Subsequently the program opens and shows the software project's who are contained inside the workspace to the left, under "Project Explorer".

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The demo is offered in two variants:

Smartberry_Webserver_6.2 - Application code is stored to the FPGA's embedded non-volatile memory (eNVM)
Smartberry_Webserver_DDR_6.2 - Application code is stored to the FPGA's external volatile memory (DDR3/L SDRAM) and lost during power down

Before flashing the demo, open a comport terminal to the boards comport, so that its messages about the used IP Address and executed Demo-Variant can be captured.

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To simply run the demo press the triangle right to the button marked with a "R" in the picture above and select a variant of the demo.

MOVE up to beginning!!!!!:------------------------

Pressing the triangle next to the button marked with "D" let you select which variant to be executed in debug mode.

Debug controls - Resume - Pause - Stop

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Switch between Debug and Run perspective (upper right corner program window)

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Demo Variants

The two demo projects "Smartberry_Webserver_6.2" and "Smartberry_Webserver_DDR_6.2" are identical variants of the demo, they only differ in their memory location. The first one is stored in embedded non volatile memory (eNVM) and the later is stored volatile in the external DDR ram and therefore lost during power down.

Static IP configuration

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To disengaging the DHCP mode one has to setup up an IP and Gateway Address in the code unit "main.c" line 274. Alternativly, the demo hosts IP Address can be changed.

Furthermore the corresponding compiler flag needs to be deleted in the project setting. To do so, in the "Project Explorer" tab, right mouse click onto the project and select Properties in the appearing menu.

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In the left section of the properties window select "C/C++ Build > Settings" in the right section select the tab "Tool Settings > GNU ARM Cross C Compiler > Preprocessor" under "Defined symbols (-D)" delete the compiler flag "NET_USE_DHCP" and press "Apply". Confirm the following dialogue and press "Cancel".

Lastly, the project needs to be recompiled. In the top menu of the SoftConsole select "Project > Build ALL / Build Project".

Warnings should not affect the demo. can be ignored.

Pictures of the Webserver pages

Open a new tab in a web browser and enter the IP Address from the comport terminal. The start page, picture below, should appear immediately.

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System Design - Libero

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Description of Block Design, Constrains... BD Pictures from Export...

Smart Design

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Constrains

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language	ruby
title	_i_bitgen.xdc

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title	SoftConsole GUI

Image Added

To simply run a Project, press the triangle right to the button marked with a "R" in the picture above and select a variant of the demo.

Pressing the triangle next to the button marked with "D" let you select which variant to be executed in debug mode.

Debug controls - Resume - Pause - Stop

Scroll Title

anchor	Figure_4
title	SoftConsole "Debug controlls"

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Switch between Debug and Run perspective (upper right corner program window)

Scroll Title

anchor	Figure_5
title	SoftConsole "Switch GUI layout"

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System Design - Libero

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Description of Block Design, Constrains... BD Pictures from Export...

Smart Design

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Constrains

Code Block

language	ruby
title	user.pdc
linenumbers	true
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# Microsemi I/O Physical Design Constraints file

# User I/O Constraints file 

# Version: v12.4 12.900.0.16

# Family: SmartFusion2 , Die: M2S010 , Package: 400 VF

# Date generated: Mon Nov 16 11:11:16 2020 


# 
# User Locked I/O Bank Settings
# 


# 
# Unlocked I/O Bank Settings
# The I/O Bank Settings can be locked by directly editing this file
# or by making changes in the I/O Attribute Editor
# 


# 
# User Locked I/O settings
# 

set_io Eth_LED1A \
-pinname Y10 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED1B \
-pinname U12 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED2A \
-pinname V14 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED2B \
-pinname U14 \
-fixed yes \
-DIRECTION OUTPUT


set_io GLED \
-pinname G17 \
-fixed yes \
-DIRECTION OUTPUT


set_io GPIO_5_F2M_taster_S4 \
-pinname E17 \
-fixed yes \
-DIRECTION INPUT


set_io GPIO_6_F2M_taster_S5 \
-pinname E16 \
-fixed yes \
-DIRECTION INPUT


set_io MAC_GMII_MDC \
-pinname N1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io PHY_LED0 \
-pinname U11 \
-fixed yes \
-DIRECTION INPUT


set_io PHY_LED1 \
-pinname T14 \
-fixed yes \
-DIRECTION INPUT


set_io PHY_MDIO \
-pinname N2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INOUT


set_io {PHY_RD[0]} \
-pinname K5 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[1]} \
-pinname H1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[2]} \
-pinname H2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[3]} \
-pinname J4 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io PHY_RESETN \
-pinname R13 \
-fixed yes \
-DIRECTION OUTPUT


set_io PHY_RX_CTL \
-pinname K1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_TD[0]} \
-pinname L1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[1]} \
-pinname M2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[2]} \
-pinname M1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[3]} \
-pinname M3 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io PHY_TX_CTL \
-pinname K3 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io RGB_B \
-pinname H6 \
-fixed yes \
-DIRECTION OUTPUT


set_io RGB_G \
-pinname F6 \
-fixed yes \
-DIRECTION OUTPUT


set_io RGB_R \
-pinname H5 \
-fixed yes \
-DIRECTION OUTPUT


set_io RLED \
-pinname G16 \
-fixed yes \
-DIRECTION OUTPUT


set_io RXC \
-pinname J2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io TXC \
-pinname K7 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT



# 
# Dedicated Peripheral I/O Settings
# 


# 
# Unlocked I/O settings
# The I/Os in this section are unplaced or placed but are not locked
# the other listed attributes have been applied
# 


#
#Ports using Dedicated Pins

#

set_io DEVRST_N \
-pinname U17 \
-DIRECTION INPUT

Software Design - SoftConsole

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optional chapter separate
sections for different apps

Application

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----------------------------------------------------------

FPGA Example

scu

MCS Firmware to configure SI5338 and Reset System.

srec_spi_bootloader

TE modified 2019.2 SREC

Bootloader to load app or second bootloader from flash into DDR

Descriptions:

Modified Files: blconfig.h, bootloader.c
Changes:
- Add some console outputs and changed bootloader read address.
- Add bugfix for 2018.2 qspi flash

xilisf_v5_11

TE modified 2019.2 xilisf_v5_11

Changed default Flash type to 5.

----------------------------------------------------------

Zynq Example:

zynq_fsbl

TE modified 2019.2 FSBL

General:

Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\
General Changes:
- Display FSBL Banner and Device ID

Module Specific:

Add Files: all TE Files start with te_*
- READ MAC from EEPROM and make Address accessible by UBOOT (need copy defines on uboot platform-top.h)
- CPLD access
- Read CPLD Firmware and SoC Type
- Configure Marvell PHY

zynq_fsbl_flash

TE modified 2019.2 FSBL

General:

Modified Files: main.c
General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation

ZynqMP Example:

----------------------------------------------------------

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
Add Files: te_xfsbl_hooks.h/.c (for hooks and board)\n\
General Changes:
- Display FSBL Banner and Device Name

Module Specific:

Add Files: all TE Files start with te_*
- Si5338 Configuration
- ETH+OTG Reset over MIO

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation

zynqmp_pmufw

Xilinx default PMU firmware.

----------------------------------------------------------

General Example:

hello_te0820

Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-

...

General Example:

hello_te0820

Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

SDK template in ./sw_lib/sw_apps/ available.

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
Add Files: te_xfsbl_hooks.h/.c (for hooks and board)\n\
General Changes:
- Display FSBL Banner and Device Name

Module Specific:

Add Files: all TE Files start with te_*
- Si5345 Configuration
- OTG+PCIe Reset over MIO
- I2C MUX for EEPROM MAC

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation

zynqmp_pmufw

Xilinx default PMU firmware.

hello_te0808

...

Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Demo - Webserver_...

The demo projects "Smartberry_Webserver_X.y" and "Smartberry_Webserver_DDR_X.y" are identical variants of the demo, they only differ in their memory location:

Smartberry_Webserver_X.y - Application code is stored to the FPGA's embedded non-volatile memory (eNVM)
Smartberry_Webserver_DDR_X.y - Application code is stored to the FPGA's external volatile memory (DDR3/L SDRAM) and lost during power down

UART output:

Scroll Title

anchor	Figure_6
title	COM-port Terminal Webserver "Welcome / IP -message"

Image Added

Static IP configuration

Scroll Title

anchor	Figure_7
title	SoftConsole "main.c - Set IP"

Image Added

To disengaging the DHCP mode one has to setup up an IP and Gateway Address in the code unit "main.c" roughly at line 270. Alternativly, the demo hosts IP Address can be changed.

Furthermore the corresponding compiler flag needs to be deleted in the project setting. To do so, in the "Project Explorer" tab, right mouse click onto the project and select Properties in the appearing menu.

Scroll Title

anchor	Figure_8
title	SoftConsole "Static IP- Change Defines""

Image Added

In the left section of the properties window select "C/C++ Build > Settings" in the right section select the tab "Tool Settings > GNU ARM Cross C Compiler > Preprocessor" under "Defined symbols (-D)" delete the compiler flag "NET_USE_DHCP" and press "Apply". Confirm the following dialogue and press "Cancel".

Lastly, the project needs to be recompiled. In the top menu of the SoftConsole select "Project > Build ALL / Build Project".

Warnings should not affect the demo. can be ignored.

Reference Design - HelloWorld_...

Hello World example as endless loop instead of one console output. Each loop lights up each LED. The user buttons responds with a message at any time.

UART output:

Scroll Title

anchor	Figure_9
title	COM-port Terminal "Hello World loop"

Image Added

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision got to "Change History" of this page and select older document revision number.

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It's semi automatically, so do following
- Add new row below first
- Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template
- Metadata is only used of compatibility of older exports

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title	Document change history.

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Date

Document Revision

Authors

Description

Page info

infoType	Modified date
dateFormat	yyyy-MM-dd
type	Flat

Page info

infoType	Current version
dateFormat	yyyy-MM-dd
prefix	v.
type	Flat

Page info

infoType	Modified by
type	Flat

Download Link update

2021-01-29

v.45

John Hartfiel

Link updates
table of content update

2020-11-24

v.41

Kilian Jahn

Libero12.4 release

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all

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infoType	Modified users
dateFormat	yyyy-MM-dd
type	Flat

--

Legal Notices

Include Page

	IN:Legal Notices
	IN:Legal Notices

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Scroll pdf ignore

Trenz Electronic Documentation

Page History

Versions Compared

Old Version 27

New Version Current

Key

Table of contents

Overview

Overview

Key Features

Key Features

Revision History

Release Notes and Know Issues

Requirements

Software

Hardware

Content

Design Sources

Design Sources

Download

Design Flow

Board configuration file

Launch

Connecting

Driver check

Programming the Hardware design

UART connection

Programming a Software project

Demo Variants

Static IP configuration

Pictures of the Webserver pages

System Design - Libero

Smart Design

Constrains

System Design - Libero

Smart Design

Constrains

Software Design - SoftConsole

Application

scu

srec_spi_bootloader

xilisf_v5_11

zynq_fsbl

zynq_fsbl_flash

zynqmp_fsbl

zynqmp_fsbl_flash

zynqmp_pmufw

hello_te0820

u-boot

hello_te0820

u-boot

zynqmp_fsbl

zynqmp_fsbl_flash

zynqmp_pmufw

hello_te0808

Demo - Webserver_...

Static IP configuration

Reference Design - HelloWorld_...

Appx. A: Change History and Legal Notices

Document Change History

Legal Notices

Table of contents