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  • through a USB connector
  • through USB lines at one B2B connector.
Note
titleOnly one connection type at one time is allowed.

Only one connection type at one time is allowed.

USB Connector

TE0320 is provided with a USB mini-B receptacle (device) connector J1 on the top side.Image Removed
Figure 19:

Scroll pdf title
titleUSB connector (top view).

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title
USB mini-B receptacle (device) connector.
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The figure below
Figure 21 shows a sample USB connection between computer and TE0320 for both configuration and operation. The USB cable provides for

  • Power supply.
  • Configuration by means of the Firmware Upgrade Tool (FUT), recommended for field upgrades. Please use a dedicated JTAG Adapter during development.
  • Data communication channel during operation.

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Scroll pdf title
titleSample USB connection (TE0320 side).
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Tip
Should you require a module version without connector J1, please contact Trenz Electronic.

USB Pins

USB communication can be performed over 2 pins of B2B connector JM4 as detailed in Table 3. Ensure resistors R3 and R4 are populated to connect USB B2B pins B2B_D_P and B2B_D_P to USB lines D_P and D_P respectively.

 

Scroll pdf title
titleUSB pins at B2B connector JM4.

pin number

pin name

signal name

description

4

B2B_D_P

D_P

USB data + (D+)

6

B2B_D_N

D_N

USB data - (D-)

Scroll pdf title
titleResistors R3 and R4 required for USB communication over B2B connector JM4.

Image Added

 In order to minimize the stub on USB lines and improve communication quality, the connection to both USB pins of B2B connector JM4 can be interrupted by removing resistors R3 and R4.Image Removed
Figure 22: resistors

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titleResistors R3 and R4 removed for lower stub on USB lines.
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TE0320 USB Controller

TE0320 is equipped with a Cypress EZ-USB FX2 controller to provide a high-speed USB 2.0 interface. The controller uses 4 interfaces (see here):

  • USB interface (to USB connector);
  • I2C interface (to EEPROM);
  • SPI interface (to FPGA and Flash);
  • FIFO interface (to FPGA).

The I2C interface connects the USB controller to the EEPROM chip, which stores vendor ID and device ID. See chapter DIP Switch for available options.
The SPI interface id used to communicate with the FPGA and to access the SPI serial Flash chip.
The FIFO interface provides a high-speed communication channel with the FPGA. The interface can transfer up to 48 MB/s burst rate.

 
Should you require a module version without connector J1, please contact Trenz Electronic.