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As not all modules have user LED's on FPGA pins, blinky designs include some different variants.

LED TypeConnected toComments
MIO LEDZynq PS MIO GPIO pinCan be controlled by software, direct control from FPGA fabric not possible (not without software assistance).
FPGA LEDFPGA I/O pinCan be controlled directly from FPGA logic. Can be controlled from Zynq ARM software if EMIO GPIO output is routed to the FPGA pin with LED. Pin location defined with XDC constraints.
DONE LEDFPGA Done pin (also on Zynq devices)Can be controlled from FPGA using USRACCESSE2 primitive, no XDC constraint needed. Can also be controlled from PS ARM code using EMIO GPIO to UACCESSE2 routing.

 

 

Design nameClock sourceLED UsedCommentsBlinks, if:
blinky_onchipFPGA internalPrimary LED on the moduleBlinks as long as the FPGA is loadedconfigured
blinky_sysledPrimary FPGA clockPrimary LED on the moduleBlinks if main Main clock is toggling
blinky_gtclkPrimary GT ClockPrimary LED on the modulePrimary GT clock is toggling
blinky_onchip_doneFPGA internalFPGA Done LEDBlinks as long as the FPGA is loaded on all targets where DONE has visible LEDconfigured
blinky_gtclk_donePrimary GT ClockFPGA Done LEDPrimary GT clock is toggling