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The Trenz Electronic TE0724 is an industrial-grade SoC module based on Xilinx Zynq - 7010/7020, which provides a dual core ARM Cortex A9 and a 7-series FPGA logic. It provides a gigabit ethernet transceiver, 1GByte 1 GByte of DDR3L SDRAM, 32 64 MByte Flash memory as configration and data storage. It includes strong powerregulators power regulators for all needed voltages and a robust high-speed connector for in- and outputs. It has a 6 x 4 cm form factor.

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  • Xilinx Zynq XC7Z010-1CLG400I or XC7Z020-1CLG400I
    • Dual-core ARM Cortex-A9 MPCore
    • Max. 667 MHz
  • Shock proof and vibration resistant
  • Size 6 x 4 cm
  • Plug-On-Modul with 1 × 160 Pin High-Speed connector
  • 1 GByte DDR3L SDRAM
  • 32 64 MByte QSPI Flash Speicher
  • 1 x GBit Ethernet PHY
  • 1 x MAC-Address EEPROM
  • 128 KBit EEPROM
  • 1 x CAN Transceiver
  • On-Board DC/DC-regulators
  • Excellent signal integrity due to well dirstributed evenly-spread supply pins

Additional assembly options are available for cost or performance optimization upon request.

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  1. XILINX ZYNQ XC7Z020-2CLG400C, U1
  2. Gigabit Ethernet Transceiver Alaska 88E1512, U7
  3. Power Manager Dialog DA9062, U4
  4. 1GByte - 2x 4Gbit DDR3L RAM, U3, U5
  5. 32MByte Spansion 64MByte ISSI SPI Flash S25FL256IS25LP512M, U13
  6. 128KByte Serial EEPROM Microchip 24AA, U10
  7.  CAN Transceiver MCP2542FDT, U2
  8.  160 Pin Samtec B2B Connector ST5-80-1.50-L-D-P-TR, J1

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Storage device name

Content

Notes

Spansion ISSI SPI Flash S25FL256IS25LP512M, U13

Empty


DA9062, U4Programmed
Microchip 24AA128T, U10EmptyUSER EEPROM
Microchip 24AA025E48T, U23MAC write protected preprogrammed, User area emptyEEPROM for MAC-Address.

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On-board QSPI flash memory (U13) on the TE0724-02 04 is a SPANSION S25FL256S ISSI IS25LP512M with 256 512 Mbit (32 64 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

...

A Microchip 24AA025E48 serial EEPROM (U23) contains a globally unique 48-bit node address, which is compatible with EUI-48(TM) specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible over I2C bus with slave device address 0x53.

Note

Max. I2C Speed for 24AA025E48  EEPROM is 100kHz.


USER EEPROM

A Microchip 24AA128T serial EEPROM (U10) is availabe available for e.g. module idetification identification and user Data. The device has 128Kbit memory with max 64 bytes page write capability. It is accessible over I2C bus with slave device address 0x50.

Oscillators

Note

Max. I2C Speed for 24AA128T EEPROM is 100kHz.

Oscillators

The module has following The module has following reference clock signals provided by on-board oscillators and external source from carrier board:

...

Optional assembled Pin Header J2 can be used for PMIC In-System Programming.

Pin

SignalB2B
J2-1VINJ1-154, J1-156, J1-158, J1-160
J2-2GND

J2-3

I2C_SCLJ1-142
J2-4I2C_SDAJ1-144
J2-5ONKEYJ1-148
J2-6PWR_TPJ1-146

Table 12: Optional assembled Pin Header.

...

Power Distribution Dependencies

DCDC U8 component is either TPS82140 (2 A) or MUN12A (3 A) depending on the variant.

Scroll Title
anchorPD_TE0724
titleFigure 43: TE0724 power distribution diagram.


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draw.io Diagram
borderfalse
viewerToolbartrue
fitWindowfalse
diagramNamePD_TE0724
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width
linksauto
tbstyletop
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diagramWidth642641
revision410


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See Xilinx data sheet for additional information. User should also check related base board documentation when intending base board design for TE0724 module.

Power-On Sequence

The TE07024 TE0724 SoM meets the recommended criteria to power up the Xilinx Zynq MPSoC properly by keeping a specific sequence of enabling the on-board DC-DC converters dedicated to the particular functional units of the Zynq chip and powering up the on-board voltages. For a detailed description of the configurabel configurable Power Management IC please refer to the datasheet of  of dialog semicondutor DA9062.

Following diagram clarifies the sequence of enabling the particular on-board voltages, which will power-up in descending ascending order as listed in the blocks of the diagram:

Scroll Title
anchorPS_TE0724
titleFigure 54: TE0724 Module power-on diagram.


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draw.io Diagram
borderfalse
viewerToolbartrue
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diagramNamePS_TE0724
simpleViewertrue
width
linksauto
tbstyletop
lboxtrue
diagramWidth642
revision3


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-

Power Rail Name

B2B JM1 Pins

Direction

Notes
VIN154, 156, 158,160InputMain supply voltage from the carrier board.
VCCIO_3554InputPL Bank 35 supply voltage.
VLDO183Output3.3V (100mA)
VLDO294Output1.8V (300mA)
VLDO3453Output2.5V (600mA)
3.3V43, 74OutputAdditional module on-board 3.3V voltage supply (1A2 A or 3 A variant dependent).
1.0V-
Buck1 & Buck2 of U4.
1.8V63OutputBuck3 of U4.
VDD_DDR-
DDR supply voltage powered by Buck4 of U4.

VBAT

152Output/InputBattery charger to the carrier board(out) and supply for RTC and 32kHz crystal (in).

Table 14: Module power rails.

Current rating of theSamtec connector is 1.5A 6A per pin (1 pin powered per row).

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Bank

Schematic Name

Voltage

Voltage Range

500 MIO13.8V 3V 13.8V3V-
501 MIO1.8V1.8V-
502 DDR3VDD_DDRV1.35V-
34 HPHR3.3V3.3V-
35 HPHRVCCIO_35User1.2V to 3.3V

Table 15: Module PL I/O bank voltages.

Board to Board Connectors

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The TE0724 module has a 160-pin double-row REF-192552-02 connector on the bottom side.

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Order
number

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Page properties
hiddentrue
idComments
  • This section is optional and only for modules.
  • use "include page" macro and link to the general B2B connector page of the module series, for example: 4 x 5 SoM LSHM B2B Connectors

Include Page
4 x 6 SoM SS5/ST5 B2B Connectors
4 x 6 SoM SS5/ST5 B2B Connectors

Variants Currently In Production

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Trenz shop TE0724 overview page
English pageGerman page

Technical Specifications

Absolute Maximum Ratings

Parameter

MinMax

Units

Reference Document

VIN supply voltage

-0.35.5

V

da9062_3v4.pdf

Storage temperature

-40

85

°C

-

Table 18: Module absolute maximum ratings.


Note
Assembly variants for higher storage temperature range are available on request.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
VIN supply voltage (variant "-Z" with MUN12A for U8)4.55.5V
VIN supply voltage (all other variants)3.65.5V
Operating temperature-4085°C

Table 19: Module recommended operating conditions.


Note
Please check Xilinx datasheet ... for complete list of absolute maximum and recommended operating ratings.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Extended grade: 0°C to +85°C.

Industrial grade: -40°C to +85°C.

Module operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Physical Dimensions

  • Module size: 60 mm × 40 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 5.0 mm.

  • PCB thickness: 1.6 mm.

  • Highest part on PCB: approx. 1.6 mm. Please download the step model for exact numbers.

All dimensions are given in millimeters.

Scroll Title
titleFigure 5: TE0724 Mechanical Dimensions.
Image AddedImage Added

Revision History

Hardware Revision History

DateRevision

Notes

2020-11-0504Changed DDR3, Flash, see PCN
2019-03-1203changed 3.3V DCDC

02AElectrical same as REV 02.

02First production release
-

01

Prototypes

Table 20: Module hardware revision history.


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Scroll Title
titleFigure 6: TE0724 module hardware revision number.

Image AddedImage Added

Document Change History

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Date

Revision

Contributors

Description

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

Page info
infoTypeCurrent version
dateFormatyyyy-MM-dd
prefixv.
typeFlat

Page info
infoTypeModified by
dateFormatyyyy-MM-dd
typeFlat

  • update for "-Z" variant (MUN12A)
2020-11-17


v.58


Martin Rohrmüller


  • update to REV04 (DDR, Flash)
2019-10-31v.56Martin Rohrmüller
  • VBAT is In/OUT (charger)
2019-10-30v.55John Hartfield
  • correction on power section

2019-06-27

v.54Martin Rohrmüller
  • Updated Power Distribution dependencies Figure (VBAT: Charge and Use)

2019-06-11

v.53 Guillermo Herrera
  • typo correction on Bank voltage section

2019-03-29

v.51Martin Rohrmüller
  • update to REV03

2018-11-20

v.44John Hartfiel
  • remove typo

2018-10-10

v.43John Hartfiel
  • Add notes to EEPROM section

2018-10-09

v.42Martin Rohrmüller
  • corrected mating high at physical dimensions

2018-10-01

v.41Martin Rohrmüller
  • corrected typo in power up order
  • updated B2B power rating

2018-09-21

v.39Martin Rohrmüller
  • B2B Connectors as include from general page

2018-07-20

v.37John Hartfield
  • small style changes

2018-07-06

v.34

Martin Rohrmüller

  • Initial document.
---

all

Page info
infoTypeModified users

...

Table 17: Module connector specifications.

Variants Currently In Production

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...

Technical Specifications

Absolute Maximum Ratings

...

Parameter

...

Units

...

Reference Document

...

VIN supply voltage

...

V

...

Storage temperature

...

-40

...

°C

...

Table 18: Module absolute maximum ratings.

Note
Assembly variants for higher storage temperature range are available on request.

Recommended Operating Conditions

...

Table 19: Module recommended operating conditions.

Note
Please check Xilinx datasheet ... for complete list of absolute maximum and recommended operating ratings.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Extended grade: 0°C to +85°C.

Industrial grade: -40°C to +85°C.

Module operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Physical Dimensions

  • Module size: 60 mm × 40 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 4.08 mm.

  • PCB thickness: 1.6 mm.

  • Highest part on PCB: approx. 1.6 mm. Please download the step model for exact numbers.

All dimensions are given in millimeters.

Scroll Title
titleFigure 6: TE0724 Mechanical Dimensions.
Image RemovedImage Removed

Revision History

Hardware Revision History

...

Notes

...

01

...

Prototypes

Table 20: Module hardware revision history.

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Scroll Title
titleFigure 7: TE0724 module hardware revision number.

Image Removed

Document Change History

HTML
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1.add new row below first
2.Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number
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  -->
Current version

Date

Revision

Contributors

Description

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat
Page info
infoType
dateFormatyyyy-MM-dd
typeFlat

Martin Rohrmüller

Initial document.

all

Jan Kumann, Ali Naseri, John Hartfiel

  • ---

Table 21: Document change history.

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