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The Trenz Electronic TE0724 is an industrial-grade SoC module based on Xilinx Zynq 7010/7020, which provides a dual core ARM Cortex A9 and a 7-series FPGA logic. It provides a gigabit ethernet transceiver, 1 GByte of DDR3L SDRAM, 64 MByte Flash memory as configration and data storage. It includes strong power regulators for all needed voltages and a robust high-speed connector for in- and outputs. It has a 6 x 4 cm form factor.

Key Features

  • Xilinx Zynq XC7Z010-1CLG400I or XC7Z020-1CLG400I
    • Dual-core ARM Cortex-A9 MPCore
    • Max. 667 MHz
  • Shock proof and vibration resistant
  • Size 6 x 4 cm
  • Plug-On-Modul with 1 × 160 Pin High-Speed connector
  • 1 GByte DDR3L SDRAM
  • 64 MByte QSPI Flash Speicher
  • 1 x GBit Ethernet PHY
  • 1 x MAC-Address EEPROM
  • 128 KBit EEPROM
  • 1 x CAN Transceiver
  • On-Board DC/DC-regulators
  • Excellent signal integrity due to evenly-spread supply pins

Additional assembly options are available for cost or performance optimization upon request.

Block Diagramm

Figure 1: TE0724 block diagram

Main Components

Figure 2: TE0724 main components
  1. XILINX ZYNQ XC7Z020-2CLG400C, U1
  2. Gigabit Ethernet Transceiver Alaska 88E1512, U7
  3. Power Manager Dialog DA9062, U4
  4. 1GByte - 2x 4Gbit DDR3L RAM, U3, U5
  5. 64MByte ISSI SPI Flash IS25LP512M, U13
  6. 128KByte Serial EEPROM Microchip 24AA, U10
  7.  CAN Transceiver MCP2542FDT, U2
  8.  160 Pin Samtec B2B Connector ST5-80-1.50-L-D-P-TR, J1

Initial Delivery State

Storage device name



ISSI SPI Flash IS25LP512M, U13


DA9062, U4Programmed
Microchip 24AA128T, U10EmptyUSER EEPROM
Microchip 24AA025E48T, U23MAC write protected preprogrammed, User area emptyEEPROM for MAC-Address.

Table 1: Initial delivery state of programmable devices on the module.

Boot Process

Boot mode is selected via two Mode pins at B2B connector J2. By default the TE0724 supports JTAG and SPI Boot Mode. Connecting a SD Card via B2B connector to MIO Pins (See SD Card Interface) gives the possibility to boot from SD Card. The Mode pins are pulled up at the module.

Boot mode

MODE1 J1-2

MODE0 J1-4

JTAG (cascade)LOWLOW
SD CARD (not on module)HIGHHIGH

Table 2: Boot mode selection.

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

I/O signals connected to the SoCs I/O bank and B2B connector: 

BankTypeB2B ConnectorI/O Signal CountBank VoltageNotes
500MIOJ18 I/Os3.3VOn-module power supply.
501MIOJ112 I/Os1.8VOn-module power supply.
34HRJ132 I/Os or 16 LVDS pairs3.3VOn-module power supply.
35HRJ148 I/Os or 24 LVDS pairsVCCIO_35Supplied by the carrier board.

Table 3: General overview of PL I/O signals connected to the B2B connectors.

All PS MIO banks as well as PL bank 34 are powered by on-module DC-DC power rails. Valid VCCO_35 for PL bank 35 should be supplied via the B2B connector.

For detailed information about the pin out, please refer to the Pin-out Tables. 

The configuration of the PS I/Os MIO40 to MIO51 depend on the carrier board peripherals connected to these pins.

JTAG Interface

JTAG access to the ZYNQ SoC is provided through B2B connector J1 and testpoints.

JTAG Signal

B2B Connector Pin


Table 4: JTAG interface signals.

System Controller Pins

Special purpose pins are available for System Controller functions and are routed to the Power Management IC (U4) with the following default configuration:

Signal NameModeFunctionB2B Connector PinConfiguration
RESETREQINPUTReset requestJ1-150Aktive LOW, enter reset mode when set low. Pulled up to VIN.
ONKEYINPUTPower-on keyJ1-148Debounced edge sensitve power mode manipulator. On/Off with optional long press shutdown, function dependent on register value of NONKEY_PIN, KEY_DELAY.
PWR_TPIN/OUTTest pinJ1-146

Enables Power Commander boot mode and supply pin for OTP fusing voltage.


Table 5: System Controller CPLD I/O pins.

Quad SPI Interface

Quad SPI Flash (U13) is connected to the Zynq PS QSPI_0 interface via PS MIO bank 500, pins MIO1 ... MIO6.

MIOSignal NameU14 Pin

Table 6: Quad SPI interface signals and connections.

SD Card Interface

There is no physical SD Card slot on the module. Three different interface options are possible at a carrier via the PS MIO 10 to 15 or 40 to 45 or 46 to 51 plus additional MIOs for SD Card Detect and Write Protect as well as SD Card Power Controls. For details compare Xilinx UG585-Zynq-7000-TRM Table 2-4.

Ethernet Interface PHY

The TE0724 is equipped with a Marvell Alaska 88E1512 Gigabit Ethernet PHY (U7) connected to PS Ethernet GEM0. The I/O Voltage is fixed at 1.8V for HSTL signaling. The reference clock input of the PHY is supplied from an on-board 25.000000 MHz oscillator (U9), the 125MHz output clock signal CLK_125MHZ is connected to the PL IO_L11P_T1_SRCC_34.

PHY PinPS bank 501B2BNotes
LED2/Interrupt--not connected
CONFIG--connected to 1.8V (VDDO), PHY Address = 1
SGMII--not connected

Table 7: Ethernet PHY connections.


A felxible data rate CAN Transceiver is provided by a Microchip MCP2542FDT.

PHY PinPL bank 34B2BNotes
CAN_L / CAN_H-J1-1 / J1-3

Table 8: CAN PHY connections.

I2C Interface

On-board I2C devices are connected to PS MIO28 (SCL) and MIO29 (SDA). I2C addresses for on-board devices are listed in the table below:

I2C Device7bit I2C AddressNotes
MAC EEPROM, U230x531.8V
USER EEPROM, U100x501.8V
Power Management U4 0x58 /  0x593.3V
J1-J1-142 SDA, J1-144 SDL at 3.3V

Table 9: I2C slave device addresses.

On-board Peripherals

Power Management IC

The power management IC (U4) is provided by dialog Semiconductors (DA9062). It controls the power-on sequencing of the various power rails. It is preprogrammed and accessible via I2C address 0x58 /  0x59. For a detailed description of the configurable power management IC please refer to the datasheet of  dialog semicondutor DA9062.

DDR Memory

By default TE0724 module has 2 DDR3L SDRAM chips arranged into 32-bit wide memory bus providing total of 1 GBytes of on-board RAM. Different memory sizes are available optionally.

Quad SPI Flash Memory

On-board QSPI flash memory (U13) on the TE0724-04 is a ISSI IS25LP512M with 512 Mbit (64 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

SPI Flash QE (Quad Enable) bit must be set to high or FPGA is unable to load its configuration from flash during power-on. By default this bit is set to high at the manufacturing plant.


A Microchip 24AA025E48 serial EEPROM (U23) contains a globally unique 48-bit node address, which is compatible with EUI-48(TM) specification. The device is organized as two blocks of 128 x 8-bit memory. One of the blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible over I2C bus with slave device address 0x53.

Max. I2C Speed for 24AA025E48  EEPROM is 100kHz.


A Microchip 24AA128T serial EEPROM (U10) is available for e.g. module identification and user Data. The device has 128Kbit memory with max 64 bytes page write capability. It is accessible over I2C bus with slave device address 0x50.

Max. I2C Speed for 24AA128T EEPROM is 100kHz.


The module has following reference clock signals provided by on-board oscillators and external source from carrier board:

Clock SourceSchematic SignalFrequencyClock Destination
SiTime SiT8008BI oscillator, U9ETH_XTAL25.000000 MHzXTAL_IN,  U7 ETH PHY
SiTime SiT8008AI oscillator, U6PS_CLK33.333333 MHzPS_CLK_500, Bank 500

Table10 : Reference clock signals.

On-board LEDs

LED ColorConnected toDescription and Notes
D1GreenPS MIO7User LED.
D2GreenPL IO_L3P_T0_34User LED.
D3RedPL IO_L4N_T0_34User LED.

Table 11: On-board LEDs.

Pin Header

Optional assembled Pin Header J2 can be used for PMIC In-System Programming.


J2-1VINJ1-154, J1-156, J1-158, J1-160



Table 12: Optional assembled Pin Header.

Power and Power-On Sequence

Power Consumption

The maximum power consumption of a module mainly depends on the design running on the FPGA.

Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Power InputTypical Current

Table 13: Typical power consumption.

 * TBD - To Be Determined soon with reference design setup.

Power supply with minimum current capability of ...A for system startup is recommended.

The on-board voltages of the TE0724 SoC module will be powered-up in order of a determined sequence after the external voltages VIN  is available and nONKEY is asserted.

To avoid any damage to the module, check for stabilized on-board voltages should be carried out (i.e. power good and enable signals) before powering up any SoC's I/O bank voltages VCCO_x. All I/Os should be tri-stated during power-on sequence.

Power Distribution Dependencies

DCDC U8 component is either TPS82140 (2 A) or MUN12A (3 A) depending on the variant.

Figure 3: TE0724 power distribution diagram.

See Xilinx data sheet for additional information. User should also check related base board documentation when intending base board design for TE0724 module.

Power-On Sequence

The TE0724 SoM meets the recommended criteria to power up the Xilinx Zynq MPSoC properly by keeping a specific sequence of enabling the on-board DC-DC converters dedicated to the particular functional units of the Zynq chip and powering up the on-board voltages. For a detailed description of the configurable Power Management IC please refer to the datasheet of dialog semicondutor DA9062.

Following diagram clarifies the sequence of enabling the particular on-board voltages, which will power-up in ascending order as listed in the blocks of the diagram:

Figure 4: TE0724 Module power-on diagram.

Power Rails

Power Rail Name

B2B JM1 Pins


VIN154, 156, 158,160InputMain supply voltage from the carrier board.
VCCIO_3554InputPL Bank 35 supply voltage.
VLDO183Output3.3V (100mA)
VLDO294Output1.8V (300mA)
VLDO3453Output2.5V (600mA)
3.3V43, 74OutputAdditional module on-board 3.3V voltage supply (2 A or 3 A variant dependent).
Buck1 & Buck2 of U4.
1.8V63OutputBuck3 of U4.
DDR supply voltage powered by Buck4 of U4.


152Output/InputBattery charger (out) and supply for RTC and 32kHz crystal (in).

Table 14: Module power rails.

Current rating of the Samtec connector is 1.6A per pin (1 pin powered per row).

Bank Voltages


Schematic Name


Voltage Range

500 MIO3.3V 3.3V-
501 MIO1.8V1.8V-
502 DDR3VDD_DDRV1.35V-
34 HR3.3V3.3V-
35 HRVCCIO_35User1.2V to 3.3V

Table 15: Module PL I/O bank voltages.

Board to Board Connectors

The module has a 160-pin double-row REF-192552-02 connector on the bottom side. The counterpart REF-192552-01 is placed on the base board.


REF NumberSamtec NumberTypeMated HeightData sheetComment
27220REF-192552-02ST5-80-1.50-L-D-P-TRModule connector5 mm connector
used on module
27219REF-192552-01SS5-80-3.50-L-D-K-TRBaseboard connector5 mm connector
used on board

 With different connectors from the used series other mating heights are possible (according to the Datasheet). The module and base board can be manufactured using other connectors upon request.

Connector SpecificationsValue
Insulator materialLiquid crystal polymer
Stacking height5 mm
Contact materialPhosphor-bronze
PlatingAu or Sn over 50 μ" (1.27 μm) Ni
Current rating1.6 A per pin (2 pins powered)
Operating temperature range-55 °C to +125 °C
RoHS compliantYes
Connector specifications.
Connector Speed Ratings

The LSHM connector speed rating depends on the stacking height; please see the following table:

Stacking heightSpeed rating
5 mm, Single-Ended 13.5GHz /  27Gbps
5 mm, Differential 20GHz / 40Gbps
4 mm, Single-Ended 13GHz /  26Gbps
4 mm, Differential 13.5GHz / 27Gbps
Speed rating.
Current Rating

Current rating of  Samtec Razor Beam™ SS5/ST5 B2B connectors is 1.6A per pin (2 pins powered).

Connector Mechanical Ratings
  • Shock: 100G, 6 ms sawtooth wave
  • Vibration: 7.56G 'RMS', 2 hours per axis, 3 axes total
Manufacturer Documentation

  File Modified
PDF File hsc-report-sma_st5-ss5-04mm_web.pdf 21 09, 2018 by Martin Rohrmüller
PDF File hsc-report-sma_st5-ss5-05mm_web.pdf 21 09, 2018 by Martin Rohrmüller
PDF File ss5_catalog.pdf 21 09, 2018 by Martin Rohrmüller
PDF File ss5-st5_specs.pdf 21 09, 2018 by Martin Rohrmüller

Variants Currently In Production

Trenz shop TE0724 overview page
English pageGerman page

Technical Specifications

Absolute Maximum Ratings




Reference Document

VIN supply voltage




Storage temperature





Table 18: Module absolute maximum ratings.

Assembly variants for higher storage temperature range are available on request.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
VIN supply voltage (variant "-Z" with MUN12A for U8)4.55.5V
VIN supply voltage (all other variants)3.65.5V
Operating temperature-4085°C

Table 19: Module recommended operating conditions.

Please check Xilinx datasheet ... for complete list of absolute maximum and recommended operating ratings.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Extended grade: 0°C to +85°C.

Industrial grade: -40°C to +85°C.

Module operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Physical Dimensions

  • Module size: 60 mm × 40 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 5.0 mm.

  • PCB thickness: 1.6 mm.

  • Highest part on PCB: approx. 1.6 mm. Please download the step model for exact numbers.

All dimensions are given in millimeters.

Figure 5: TE0724 Mechanical Dimensions.

Revision History

Hardware Revision History



2020-11-0504Changed DDR3, Flash, see PCN
2019-03-1203changed 3.3V DCDC

02AElectrical same as REV 02.

02First production release



Table 20: Module hardware revision history.

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Figure 6: TE0724 module hardware revision number.

Document Change History





  • update for "-Z" variant (MUN12A)


Martin Rohrmüller

  • update to REV04 (DDR, Flash)
2019-10-31v.56Martin Rohrmüller
  • VBAT is In/OUT (charger)
2019-10-30v.55John Hartfield
  • correction on power section


v.54Martin Rohrmüller
  • Updated Power Distribution dependencies Figure (VBAT: Charge and Use)


v.53 Guillermo Herrera
  • typo correction on Bank voltage section


v.51Martin Rohrmüller
  • update to REV03


v.44John Hartfiel
  • remove typo


v.43John Hartfiel
  • Add notes to EEPROM section


v.42Martin Rohrmüller
  • corrected mating high at physical dimensions


v.41Martin Rohrmüller
  • corrected typo in power up order
  • updated B2B power rating


v.39Martin Rohrmüller
  • B2B Connectors as include from general page


v.37John Hartfield
  • small style changes



Martin Rohrmüller

  • Initial document.


  • ---

Table 21: Document change history.


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Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.


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Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

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