<!--
Link to the base folder of the module (remove de/ or en/ from the URL): for example:
https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703/
-->
The TE0782 board is programmed in the SC CPLD firmware to boot initially from the on-board QSPI Flash memory U38. See section Bootmodein the TE0782 SC CPLD reference Wiki page.
...
The Xilinx Zynq-7000 SoC used on the TE0782 module has 16 MGT transceiver lanes. All of them are wired directly to B2B connectors J1 and J3. MGT (Multi Gigabit Transceiver) lane consists of one transmit and one receive (TX/RX) differential pairs, four signals total per one MGT lane with data transmission rates up to 12.5Gb/s per lane (Xilinx GTX transceiver). Following table lists lane number, FPGA bank number, transceiver type, signal schematic name, board-to-board pin connection and FPGA pins connection:
Board to
Bank
Type
Lane
Signal Name
B2B Pin
FPGA Pin
109
GTX
0
MGT_RX0_P
MGT_RX0_N
MGT_TX0_P
MGT_TX0_N
J3-32
J3-30
J3-31
J3-29
MGTXRXP0_109
MGTXRXN0_109
MGTXTXP0_109
MGTXTXN0_109
1
MGT_RX1_P
MGT_RX1_N
MGT_TX1_P
MGT_TX1_N
J3-28
J3-26
J3-27
J3-25
MGTXRXP1_109
MGTXRXN1_109
MGTXTXP1_109
MGTXTXN1_109
2
MGT_RX2_P
MGT_RX2_N
MGT_TX2_P
MGT_TX2_N
J3-24
J3-22
J3-23
J3-21
MGTXRXP2_109
MGTXRXN2_109
MGTXTXP2_109
MGTXTXN2_109
3
MGT_RX3_P
MGT_RX3_N
MGT_TX3_P
MGT_TX3_N
J3-20
J3-18
J3-19
J3-17
MGTXRXP3_109
MGTXRXN3_109
MGTXTXP3_109
MGTXTXN3_109
110
GTX
0
MGT_RX4_P
MGT_RX4_N
MGT_TX4_P
MGT_TX4_N
J3-16
J3-14
J3-15
J3-13
MGTXRXP0_110
MGTXRXN0_110
MGTXTXP0_110
MGTXTXN0_110
1
MGT_RX5_P
MGT_RX5_N
MGT_TX5_P
MGT_TX5_N
J3-12
J3-10
J3-11
J3-9
MGTXRXP1_110
MGTXRXN1_110
MGTXTXP1_110
MGTXTXN1_110
2
MGT_RX6_P
MGT_RX6_N
MGT_TX6_P
MGT_TX6_N
J3-8
J3-6
J3-7
J3-5
MGTXRXP2_110
MGTXRXN2_110
MGTXTXP2_110
MGTXTXN2_110
3
MGT_RX7_P
MGT_RX7_N
MGT_TX7_P
MGT_TX7_N
J3-4
J3-2
J3-3
J3-1
MGTXRXP3_110
MGTXRXN3_110
MGTXTXP3_110
MGTXTXN3_110
111
GTX
0
MGT_RX8_P
MGT_RX8_N
MGT_TX8_P
MGT_TX8_N
J1-1
J1-3
J1-2
J1-4
MGTXRXP0_111
MGTXRXN0_111
MGTXTXP0_111
MGTXTXN0_111
1
MGT_RX9_P
MGT_RX9_N
MGT_TX9_P
MGT_TX9_N
J1-5
J1-7
J1-6
J1-8
MGTXRXP1_111
MGTXRXN1_111
MGTXTXP1_111
MGTXTXN1_111
2
MGT_RX10_P
MGT_RX10_N
MGT_TX10_P
MGT_TX10_N
J1-9
J1-11
J1-10
J1-12
MGTXRXP2_111
MGTXRXN2_111
MGTXTXP2_111
MGTXTXN2_111
3
MGT_RX11_P
MGT_RX11_N
MGT_TX11_P
MGT_TX11_N
J1-13
J1-15
J1-14
J1-16
MGTXRXP3_111
MGTXRXN3_111
MGTXTXP3_111
MGTXTXN3_111
112
GTX
0
MGT_RX12_P
MGT_RX12_N
MGT_TX12_P
MGT_TX12_N
J1-17
J1-19
J1-18
J1-20
MGTXRXP0_112
MGTXRXN0_112
MGTXTXP0_112
MGTXTXN0_112
1
MGT_RX13_P
MGT_RX13_N
MGT_TX13_P
MGT_TX13_N
J1-21
J1-23
J1-22
J1-24
MGTXRXP1_112
MGTXRXN1_112
MGTXTXP1_112
MGTXTXN1_112
2
MGT_RX14_P
MGT_RX14_N
MGT_TX14_P
MGT_TX14_N
J1-25
J1-27
J1-26
J1-28
MGTXRXP2_112
MGTXRXN2_112
MGTXTXP2_112
MGTXTXN2_112
3
MGT_RX15_P
MGT_RX15_N
MGT_TX15_P
MGT_TX15_N
J1-29
J1-31
J1-30
J1-32
MGTXRXP3_112
MGTXRXN3_112
MGTXTXP3_112
MGTXTXN3_112
...
Board to Board Connectors
Include Page
8.5 x 8.5 SoM QSH and QTH B2B Connectors
8.5 x 8.5 SoM QSH and QTH B2B Connectors
The TE0782 SoM has three 160-pin double-row ASP-122952-01 Samtec connectors on the bottom side which mate with ASP-122953-01 Samtec connectors on the baseboard. Mating height is 5 mm.