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Scroll Title
anchorFigure_OV_BD
titleTEF0003 block diagram


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Main Components

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titleReset Process.

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Signal

DescriptionNote

PRSNT_TOP

Lattice MachXO Configuration Pin


PROG_BArtix 7 Configuration PinConnected Pulled up to 1.8


Signals, Interfaces and Pins

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titleGeneral PL I/O to FMC Connectors information

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FPGAFPGA BankConnector DesignatorI/O Signal CountVoltage LevelNotes
Artix 7, U116J1B68 Single Ended, 34 Differential1.8V
35J6B68 Single Ended, 34 Differential1.8V
Lattice MachXO, U0J1F4 Single Ended 3.3VCPLD
0J6F4 Single Ended 3.3VCPLD


Coaxial Connectors

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titleCoaxial Connectors information

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DesignatorSchematicConnected toNotes
J2GA_OUTSerializer, U5
J3GB_OUTSerializer, U6
J4GC_OUTSerializer, U7
J5GD_OUTSerializer, U8



JTAG Interface

The Lattice MachXO (U15) is available to meet the requirement of a CPLD, JTAG access to the MachXO is available through FMC Adapter J6. JTAG access to the Artix 7(U1) is available via MachXO, Bank 2.

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titleCPLD JTAG pins connection

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JTAG Signal

B2B Connector

Notes
FMC_TMSJ6F-TCK
FMC_TDI_TOPJ6F-J1-TDI
FMC_TDO_TOPJ6F-TDO
FMC_TCK

J6F-TCK


JTAGENPulled down



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titleJTAG pins connection

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JTAG Signal

Connected to

Note
TMS

Lattice MachXO, U15

BankArtix 7 FPGA, U1

Bank 2

Bank 0

TDI

Lattice MachXO, U15

Artix 7 FPGA, U1

Bank 2

Bank 0

TDO

Lattice MachXO, U15

Artix 7 FPGA, U1

Bank 2

Bank 0

TCK

Lattice MachXO, U15

Artix 7 FPGA, U1

Bank 2

Bank 0

INIT

Artix 7 FPGA, U1

Connected Pulled up to 1.8


On-board Peripherals

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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
SPI FlashU9
EEPROMU4
OscillatorsU11
,

Programmable Clock GeneratorU10


Quad SPI Flash Memory

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idComments

Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

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Scroll Title
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titleI2C EEPROM interface MIOs and pins

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U4 PinFMC Pcam AdapterSchematic
U4 Pin
Notes
Notes
SCLJ1F-SCLFMC_SCL
SCL

SDAJ1F-SDAFMC_SDA
SDA

A0J1F-GA0GA0
A0

A1J1F-GA1GA1
A1

A2--Pulled Low
WP--Pulled Low



Scroll Title
anchorTable_OBP_I2C_EEPROM
titleI2C address for EEPROM

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I2C AddressDesignatorNotes
0x50
0xA0U4Write operations are enabled 


Clock Sources

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titleOsillators

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DesignatorDescriptionFrequencyNote
U4U11Oscillator25.00  MHz
U10Programmable Clock GeneratorVariable


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titlePower Consumption

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Power Input PinTypical Current
VIN3P3VTBD*


* TBD - To Be Determined

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titlePower Distribution


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titlePS absolute maximum ratings

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SymbolsDescriptionMinMaxUnit
12V3P3VInput Supply Voltage-12120.53.75V
T_STGStorage Temperature-4085°C


Recommended Operating Conditions

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Scroll Title
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titleRecommended operating conditions.

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ParameterMinMaxUnitsReference Document
12V
3P3V
12
2.3753.465V
T_OPR-4085°CSee MT25QU512ABB8E12-0SIT (U9)  datasheet.


Physical Dimensions

  • Module size: 84 mm × 65 mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: 10 mm.

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Scroll Title
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titlePhysical Dimension

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titleHardware Revision History

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DateRevisionChangesDocumentation Link
2017-06-27REV01

Initial Release

REV01


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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