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The Trenz Electronic TE0723 is a Arduino compatible FPGA module Zynq board with numerous on-board peripherals based on the Xilinx Zynq XC7Z010 SoC.

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BankTypeConnectorI/O Signal CountVoltageNotes
34HRJ183.3VSignal Schematic names: 'SCL', 'SDA', 'D8' ... 'D13'.
34HRJ283.3VSignal Schematic names: 'RXD', 'TXD', 'D2' ... 'D7'.
34HRJ683.3VSignal Schematic names: 'PIO01' ... 'PIO08'.
34HRJ1113.3VSignal Schematic name: 'AIN_FPGA'.
35HRJ463.3V

Signal Schematic names: 'AIN0' ... 'AIN5', usable as single ended of differential analog input inputs or regular digital I/O's.

35HRJ513.3VConnector dedicated to ESP8266 module.
500MIOJ1073.3VSDIO interface to SD Card socket.
 501MIOJ543.3VConnector dedicated to ESP8266 module  .

Table 2: Overview of the Zynq SoC's PS/PL banks I/O signals

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BankTypeVCCIOI/O Signal CountAvailable on ConnectorsNotes
34HR3.3V44258 user I/O's on Pmod connector J6, female pin header J1 and J2 each. 1 I/O on pin header J11.
35HR3.3V876 user I/O's on female pin header J4, 1 user I/O on female pin header J5.
500PS MIO3.3V15-6 MIO pins used for QSPI flash memory interface, 7 MIO pins used for SD Card interface, 1 MIO pin connected to red LED D2,
1 MIO pin as reset pin routed to USB PHY U18, 'POR_B'-signal is connected to voltage monitor circuit 23.
501PS MIO3.3V16412 MIO pins used for USB ULPI interface, 4 MIO pins used for ESP8266 interface header J5.
0Config3.3V54-4 I/O's are dedicated to JTAG interface, 'PROG_B'-signal is connected to voltage monitor circuit 23.

Table 3: General overview of Zynq SoC PL/PS I/O bank

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The analog input channels can be selected by the pins 'AMUX_SO', 'AMUX_S1' and 'AMUX_S2', which are connected to the Zynq PL bank 34, pin G12, H12, G11:

Analog Input Channel

[AMUX_S2:AMUX_S1:AMUX_S0]

Connector pinNote
AIN0000J4-1-
AIN1001J4-2-
AIN2010J4-3-
AIN3011J4-4-
AIN4100J4-5-
AIN5101J4-6-
AIN6110J11-1-
VIN_SENSE111-half divided 5V input supply voltage

Table 11: Selecting multiplexer analog input channels


Another feature of the analog interface capacities of the XADC units of the Zynq device are the Auxiliary Analog Inputs of the Zynq device's PL bank 35 (see Xilinx document UG480, section 'Auxiliary Analog Inputs'). With 6 pins of female pin header J4 3 analog differential pairs can be created:

Analog differential Input Pin Pair

Connector pin

Connector pin
Signal Schematic NameNote
IO_L1P_T0_AD0P_35, pin F12
IO_L1N_T0_AD0N_35, pin E13
J4-3
J4-1
AIN2
AIN0
I/O's also usable in digital mode

IO_L2P_T0_AD8P_35, pin F11
IO_L2N_T0_AD8N_35, pin E12

J4-4
J4-2
AIN3
AIN1
I/O's also usable in digital mode

IO_L3P_T0_DQS_AD1P_35, pin F13
IO_L3N_T0_DQS_AD1N_35, pin F14

J4-6
J4-5
AIN5
AIN4
I/O's also usable in digital mode

Table 12: Auxiliary Analog Inputs of the Zynq device

Note: These 6 auxiliary analog inputs pins are analog inputs are shared with PL bank pins and can be used as regular digital I/O's.

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Table 13: Reference clock signals.

On-board LEDs

There are three LEDs on-board TE0723:

LEDColorConnected toDescription and Notes
D2RedZynq PS bank 500, pin MIO9User LED.
D6

Green

Zynq PL bank 34, pin G14User LED.
D7

Green

3.3V

Indicating 3.3V voltage level.

Table 14: On-board LEDs

Push Buttons

The TE0723 board is equipped with one push buttons S1:

ButtonSignal Schematic NameConnected toNotes
S1NRSTVoltage Monitor Circuit, U23Triggers system reset.

Table 15: Push buttons of the module

Power and Power-On Sequence

Power Supply

To power-up a module, power supply with minimum current capability of 1A is recommended.

Power Supply

5V power can be supplied by the external power supply 5V power can be supplied by the external power supply through connector J12 or via USB connection to the host system through USB connector J8 or J9. Minimum current capability of 1A for external power supply is recommended.

Following diagram shows the dependencies of the power supply:

Image Added

Figure 3: Module power supply dependencies

Power Consumption

Power consumption is to be determined by the user and depends on SoC's FPGA design and connected hardware.

Board VariantFPGADesignTypical Power

...

, 25°C ambient
TE0723-02XC7Z010-1CLG225CNot configuredTBD*
TE0723-03MXC7Z010-1CLG225CNot configuredTBD*
TE0723-03-07S-1CXC7Z007S-1CLG225CNot configuredTBD*

Table 16: Module power consumption

Power-On Sequence

There is no specific power-on sequence, There is no specific power-on sequence, system will power-up automatically when 5V is present either through J8, J9 or J12.

Variants Currently in Production

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DDR3L SDRAM

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ARM Cores

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PL Cells

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Block RAM

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DSP Slices

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Voltage Monitor Circuit

The voltages 1.0V (core voltage) and 3.3V are monitored by the voltage monitor circuit U23, which generates the POR_B reset signal at power-on. A manual reset is also possible by driving the connector pin J3-3 ('EXT_RST') to GND (leave this pin unconnected or connect to VDD (3.3V) when unused) or press switch button S1, which is assigned to the signal 'NRST'.

Image Added

Figure 4Voltage monitor circuit

Power Rails

The voltage direction of the power rails is directed at on-board connectors' view:


Main Power Pins DesignatorVCC / VCCIODirectionPinsNotes
J125VIn

1

5V power supply pin header.
J33.3VOut2, 4On-board 3.3V voltage level available.
5VIn / Out5On-board 5.0V voltage level available or supply pin.

Table 17: Main power pin header description


I/O pin headerVCC / VCCIODirectionPinsNotes
J53.3VOut

4, 8

I/O header VCCIO.
J63.3VOut6, 12I/O header VCCIO.

Table 18: Power pin description of I/O pin header  


Peripheral Socket DesignatorVCC / VCCIODirectionPinsNotes
J8 / J9USB-VBUSIn / Out1Direction depends on USB2 mode.
J103.3VOut4MikroSD Card socket VDD.

Table 19: Power pin description of peripheral connector

Bank Voltages

Bank

Bank I/O Voltage VCCO

Voltage Range

0 (config)3.3Vfixed
500 (MIO)3.3Vfixed
501 (MIO)3.3Vfixed
34 (HR)3.3Vfixed
35 (HR)3.3Vfixed

Table 20: Board bank voltages

Variants Currently in Production

 Board VariantXilinx Zynq SoC

DDR3L SDRAM

ARM Cores

PL Cells

LUTsFlip-Flops

Block RAM

DSP Slices

Zynq SoC Operating Temp.Temp. Range
TE0723-02XC7Z010-1CLG225C128 MBytesDual-core28K17,6K35,2K2.1 MBytes800°C to +85°CCommercial
TE0723-03MXC7Z010-1CLG225C512 MBytesDual-core28K17,6K35,2K2.1 MBytes800°C to +85°CCommercial
TE0723-03-07S-1CXC7Z007S-1CLG225C512 MBytesSingle-core23K14,4K28,8K1.8 MBytes660°C to +85°CCommercial

Table 21: Board variants

Technical Specifications

Absolute Maximum Rating

Parameter

MinMax

Units

Reference Document

5V power supply voltage

4.755.25

V

USB2.0 VBUS voltage specification
HR PL I/O banks input voltage (VCCIO single ended)-0.4VCCO + 0.55VXilinx datasheet DS187 (VCCO 3.3V nominal)
PS MIO I/O banks input voltage (VCCIO single ended)-0.4VCCO + 0.55VXilinx datasheet DS187 (VCCO 3.3V nominal)
Analog Multiplexer IC pins input voltage03.3VVTI CDx4HC405x data sheet

Storage temperature

-40

+85

°C

WL-SMCW SMD LED data sheet

Table 22: Board absolute maximum ratings

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
5V power supply voltage4.755.25 VUSB2.0 VBUS voltage specification
HR PL I/O banks input voltage (VCCIO single ended)-0.20VCCO + 0.20VXilinx datasheet DS187 (VCCO 3.3V nominal)
PS MIO I/O banks input voltage (VCCIO single ended)-0.20VCCO + 0.20VXilinx datasheet DS187 (VCCO 3.3V nominal)
Analog Multiplexer IC pins input voltage03.3VVTI CDx4HC405x data sheet

Operating Temperature Commercial

0+85°CXilinx datasheet DS190

Table 23: Board recommended operating conditions

 

Note
Please check Xilinx datasheet DS187 for complete list of absolute maximum and recommended operating ratings for the Zynq-7 device

Table 10: Module variants.

Technical Specifications

Absolute Maximum Ratings

...

Parameter

...

Units

...

Reference Document

...

VIN supply voltage

...

V

...

Storage temperature

...

-40

...

+85

...

°C

...

Table 11: TE0723 module absolute maximum ratings.

Recommended Operating Conditions

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Table 12: TE0723 module recommended operating conditions.

 

Note
Assembly variants for higher storage temperature range are available on request.

Physical Dimensions

  • Module size: 68.58 mm × 53.34 mm.  Please download the assembly diagram for exact numbers.

  • PCB thickness: 1.6 mm.

  • Highest part on PCB: approx. 4 mm. Please download the step model for exact numbers.

Please note that two different units are used on the figures below, SI system millimeters (mm) and imperial system thousandths of an inch(mil). To convert mils to millimeters and vice versa use formula 100mil's = 2,54mm.

Image Removed Image Removed

Figure 3: TE0723 module physical dimensions.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Industrial grade: -40°C to +85°C.

54mm.

Image Added        Image Added

Figure 5: Board physical dimensionsOperating temperature range depends also on customer design and cooling solution. Please contact us for options.

Revision History

Hardware Revision History

DateRevision

Notes

PCNDocumentation Link
2016-07-1503 

Refer to Changes list in Schematic for further details in changes to REV02

-Click to see PCN.TE0723-03
2015-11-06
02 Second Production Release -TE0723-02
 -

01

 First Production Release - -

Table 1324: TE0723 Board hardware revision history.

Hardware revision number is printed on the PCB board together with the module model number separated by the dash.

Figure 6: TE0723 board hardware revision number

Document Change History

Date

Revision

Contributors

Description

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd



Ali Naseri,
Jan Kumann

Initial document.
  • First TRM release

Table 1425: Document change history.

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