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BankTypeConnectorI/O Signal CountVoltageNotes
34HRJ183.3VSignal Schematic names: 'SCL', 'SDA', 'D8' ... 'D13'.
34HRJ283.3VSignal Schematic names: 'RXD', 'TXD', 'D2' ... 'D7'.
34HRJ683.3VSignal Schematic names: 'PIO01' ... 'PIO08'.
34HRJ1113.3VSignal Schematic name: 'AIN_FPGA'.
35HRJ463.3V

Signal Schematic names: 'AIN0' ... 'AIN5', usable as single ended of differential analog input inputs or regular digital I/O's.

35HRJ513.3VConnector dedicated to ESP8266 module.
500MIOJ1073.3VSDIO interface to SD Card socket.
 501MIOJ543.3VConnector dedicated to ESP8266 module  .

Table 2: Overview of the Zynq SoC's PS/PL banks I/O signals

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BankTypeVCCIOI/O Signal CountAvailable on ConnectorsNotes
34HR3.3V44258 user I/O's on Pmod connector J6, female pin header J1 and J2 each. 1 I/O on pin header J11.
35HR3.3V876 user I/O's on female pin header J4, 1 user I/O on female pin header J5.
500PS MIO3.3V15-6 MIO pins used for QSPI flash memory interface, 7 MIO pins used for SD Card interface, 1 MIO pin connected to red LED D2,
1 MIO pin as reset pin routed to USB PHY U18, 'POR_B'-signal is connected to voltage monitor circuit 23.
501PS MIO3.3V16412 MIO pins used for USB ULPI interface, 4 MIO pins used for ESP8266 interface header J5.
0Config3.3V54-4 I/O's are dedicated to JTAG interface, 'PROG_B'-signal is connected to voltage monitor circuit 23.

Table 3: General overview of Zynq SoC PL/PS I/O bank

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ButtonSignal Schematic NameConnected toNotes
S1'NRST'Voltage Monitor Circuit, U23Triggers system reset.

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 Board VariantXilinx Zynq SoC

DDR3L SDRAM

ARM Cores

PL Cells

LUTsFlip-Flops

Block RAM

DSP Slices

Zynq SoC Operating Temp.Temp. Range
TE0723-02XC7Z010-1CLG225C128 MBytesDual-core28K17,6K35,2K2.1 MBytes800°C to +85°CCommercial
TE0723-03MXC7Z010-1CLG225C512 MBytesDual-core28K17,6K35,2K2.1 MBytes800°C to +85°CCommercial
TE0723-03-07S-1CXC7Z007S-1CLG225C512 MBytesSingle-core23K14,4K28,8K1.8 MBytes660°C to +85°CCommercial

Table 21: Board variants

Technical Specifications

Absolute Maximum

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Rating

Parameter

MinMax

Units

Reference Document

VIN supply voltage

-0.53.6

V

Xilinx datasheet DS187.

Storage temperature

-40

+85

°C

 

Table 22: Board absolute maximum ratings.

Recommended Operating Conditions

5V power supply voltage

4.755.25

V

USB2.0 VBUS voltage specification
HR PL I/O banks input voltage (VCCIO single ended)-0.4VCCO + 0.55VXilinx datasheet DS187 (VCCO 3.3V nominal)
PS MIO I/O banks input voltage (VCCIO single ended)-0.4VCCO + 0.55VXilinx datasheet DS187 (VCCO 3.3V nominal)
Analog Multiplexer IC pins input voltage03.3VVTI CDx4HC405x data sheet

Storage temperature

-40

+85

°C

WL-SMCW SMD LED data sheet

Table 22: Board absolute maximum ratings

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
5V power supply voltage4.755.25 VUSB2.0 VBUS voltage specification
HR PL I/O banks input voltage (VCCIO single ended)-0.20VCCO + 0.20VXilinx datasheet DS187 (VCCO 3.3V nominal)
PS MIO I/O banks input voltage (VCCIO single ended)-0.20VCCO + 0.20VXilinx datasheet DS187 (VCCO 3.3V nominal)
Analog Multiplexer IC pins input voltage03.3VVTI CDx4HC405x data sheet

Operating Temperature Commercial

0+85°CXilinx datasheet DS190
ParameterMinMaxUnitsReference DocumentSupply voltage1.143.465 VXilinx datasheet DS187.

Table 23: Board recommended operating conditions

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Note
Please check Xilinx datasheet DS187 for complete list of absolute maximum and recommended operating ratings for the Zynq-7 device.

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Please note that two different units are used on the figures below, SI system millimeters (mm) and imperial system thousandths of an inch(mil). To convert mils to millimeters and vice versa use formula 100mil's = 2,54mm.

Image Modified        Image Modified

Figure 5: Board physical dimensions

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DateRevision

Notes

PCNDocumentation Link
2016-07-1503

Refer to Changes list in Schematic for further details in changes to REV02

-TE0723-03
2015-11-06
02Second Production Release -TE0723-02
 -

01

First Production Release - -

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Figure 6: TE0723 board hardware revision number

Document Change History

Date

Revision

Contributors

Description

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd



Ali Naseri,
Jan Kumann

  • First TRM release

Table 25: Document change history.

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