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- SMT pin header, J26
- SMT pin header, J27
- Board to Board (B2B) Connector, JM1
- Board to Board (B2B) Connectorr, JM2
- XMOD header, JX1
- Voltage Regulator, U1
- User Red LED, D2
- User Green LED, D1 (Red)
- SFP+ Connector, J1
- User Red LED, D3
- 50 - pin header solder pad(Not assembled), J20
- 16 - pin header solder pad(Not assembled), J3,
- 10-pin header solder pad(Not assembled), J4
- 50-pin header solder pad(Not assembled), J17
Initial Delivery State
Page properties |
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Notes :Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
- Pin headers (not soldered to the board, but included in the package as separate component)
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anchor | Table_OV_IDS |
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title | Initial delivery state of programmable devices on the module |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Storage device name | Content | Notes |
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--- | --- | --- |
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anchor | Table_OV_RST |
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title | Reset process. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | B2B | Signal State | Note |
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PROG_B | JM1-94 | Active Low | Clear FPGA configuration vand and initiate a new configuration |
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Board to Board (B2B) I/Os
FPGA bank number and number Number of I/O signals and Interfaces connected to the B2B connector:
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector | Interface | Number of I/O | Notes |
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JM1
| User I/O | 52 Single ended, 27 Differential | - | MGT lanes | 4 Differential, 2 lanes |
| MGT reference clock input | 2 Single ended, 1 Differential |
| JTAG | 4 Single ended |
| SoM control signals | 2 Single ended | 'PROG_B', ' DONE' | JM2 | User I/O | 36 Single ended or 18 differential | - | SFP+ Interface control signals | 8 Single ended |
| QSPI interface | 6 Single ended |
| UART interface | 2 Single ended |
| User LEDs | 2 Single ended | Red, Green | SoM control signals | 1 Single ended | 'BOOTMODE' |
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TEBA0714 is equipped with four pin headers J17, J20, J3 and J4 which are not assembled on the board, in case of need customer can solder the pins and have access to the signals in the following table.
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Scroll Title |
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anchor | Table_SIP_PinHeader |
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title | General PL I/O to Pin headers information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Pin Header | Interface | Number of I/O | Notes |
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J17
| User I/O | 36 Single ended, 18 Differential | Module FPGA Bank 14 | SPI interface | 6 Single ended | - | Power | 4 Single ended | 3.3V, V_CFG | J20 | User I/O | 42 Single ended or 21 differential | Module FPGA Bank 34 | Power | 4 Single ended | 3.3V, V_CFG | User LEDs | 2 Single ended | Red, Green | SoM control signals | 1 Single ended | 'BOOTMODE' | J3 | JTAG | 4 Single ended |
| UART | 2 Single ended | B14_L25, B14_L0 | ADC | 2 Single ended |
| Clock | 2 Single ended, 1 Differential |
| Power | 4 Single ended | 3.3V, V_CFG | Control Signals | 2 Single ended | BOOTMODE, PROG_B | J4 | User I/O | 6 Single ended or 3 differential |
| Power | 2 Single ended | 3.3V, 3.3V_OUT |
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Scroll Title |
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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XMOD Header Pin | Schematic | B2B Connector |
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Connected toPin Header | Note |
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A | B14_L25 | JM2-97 | B14_L25J3-4 | UART Transfer | B | B14_L0 | JM2-99 | B14_L0J3-7 | UART Receive | E | BOOTMODE | JM2-100 | BOOTMODEPROG_BTCKTDITDOTMS3.3V | J3,J4,J17,J20 | Nominal Input Voltage | VIO |
JM2-53 | V_CFG | - | J17-45 | Configuration Voltage |
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The DIP-switch S2 on Xmod XMOD Adapter TE0790 must be set as the following table.
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anchor | Table_SIP_XMODS2 |
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title | JTAG pins connection |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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ONOFF | Default | 1 | Normal mode | Adapter board CPLD update mode | Notes |
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1 | ON | Update Mode JTAG access to SC CPLD only |
| 2 | Do not use (illegal setting)Normal mode | OFF | Must be in OFF state always | .3 | VIO connected to 3.3V | Power VIO from pin header J2 | OFF | User I/O Voltage | 4 | Power 3.3V from USB | Power 3.3V from pin header J2 | OFF | Power on-board peripherals (FTDI chip & SC CPLD, ...) | |
The voltages 3.3V (VCC) and VIO (variable SC CPLD I/O-voltage) should be configured by the DIP-switches S2-3 and S2-4 as the following.
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| 3 | OFF | 3.3V is input | supplied from pin headers externally | 4 | OFF | VIO is input | supplied from pin header externally |
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anchor | Table_SIP_XMODS3/4 |
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title | JTAG pins connection |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | widths | sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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S2-3 | S2-4 | 3.3V (VCC) Pin 5 | VIO Pin 6 | Description |
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OFF | OFF | 3.3V from base (input**) | VIO from base (input**) | 3.3V (pin 5) and VIO (pin 6) sourced from base |
OFF | ON | 3.3V from USB* (output**) | VIO from base (input**) | VIO sourced from base by Pin 6 |
ON | OFF | 3.3V from base (input**) | 3.3V from base (input**) | VIO and 3.3V source by base (Pin 5 and Pin 6 are shorted and both must be sourced by 3.3V) |
ON | ON | 3.3V from USB* (output**) | 3.3V from USB* (output**) | 3.3V (pin 5) and VIO (pin 6) sourced USB (Pin 5 and Pin 6 are shorted and both are 3.3V)
SFP+ Connector
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anchor | Table_SIP_SFP+ |
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title | SFP+ Connector Information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Pin | Connected to | Notes |
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VCCR | 3.3V |
| VCCT | 3.3V |
| VREF | GND |
| TD+/TD- | MGT TX | MGT Lane | RD+/RD- | MGT RX | MGT Lane | TX/FAULT | SFP0_TX_FAUL | SFP_CTRL | TX/DISABLE | SFP0_TX_DIS | SFP_CTRL | MOD-DEF2 | SFP0_SDA | SFP_CTRL | MOD-DEF1 | SFP0_SCL | SFP_CTRL | MOD-DEF0 | SFP0_MT_DEF0 | SFP_CTRL | RS0/RS1 | SFP0_RS0_1 | SFP_CTRL | LOS | SFP0_LOS | SFP_CTRL |
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Scroll Title |
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anchor | Table_SIP_SMD |
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title | SMD Connector Information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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SMT Pin Header | VCCIO/VCC | Voltage Level | Notes |
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J26 | VCCIO34
| 1.8V |
| 2. | 5V5V |
| 3.3V | 3.3V_OUT | J27 | V_CFG
| 1.8V |
| 2.5V | V_CFG0 | 3.3V | 3.3V_OUT |
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On-board Peripherals
Page properties |
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Notes :- add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Scroll Title |
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Color | Connected to | Active Level | Note |
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D1 | Green | GLED | Active High |
| D2 | Red | RLED | Active High |
| D3 | Red | DONE | Active Low | DONE pin |
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Power and Power-On Sequence
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Scroll Title |
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anchor | Table_PWR_PC |
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title | Power Consumption |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Power Input Pin | Typical Current |
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VIN3.3V | * TBD |
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* TBD - To Be Determined
Power Distribution Dependencies
3.3V can be supplied through Pin Headers on specific pins.
Scroll Title |
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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Scroll Ignore |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 79 |
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diagramName | TEBA0714_PWR_PD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 640 |
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Scroll Only |
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There is no specific power-on sequence, after power up . After power on, the module and carrier will be powered on.
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Scroll Title |
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anchor | Table_PWR_PR |
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title | Module power rails. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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ConnectorJM1 Pin , JM1 Pin | B2B JM2 Pin | Pin Header J17 | Pin Header J20 | Pin Header J3 | Pin Header J4 |
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B2B Connector JM2 Pin,97-,97 | - | 5, 46 | 5, 46 | 5 | 5 | Input |
| 1.8V | - | 18 | - | - | - | - | Input | Comes from Module | 3.3V_OUT | 83 | 54 | - | - | - | 6 | Output |
| VCCIO34 | 61 | - | - | 45 | - | - | Output | Variable voltage level | V_ | CFG0CFG | 53 | - | - | - | - | - | Input | Variable voltage level |
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Board to Board Connectors
Page properties |
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- This section is optional and only for modules.
- use "include page" macro and link to the general B2B connector page of the module series,For example: 6 x 6 SoM LSHM B2B Connectors
Include Page |
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| PD:6 x 6 SoM LSHM B2B ConnectorsPD: |
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| 6 x 6 SoM LSHM B2B Connectors |
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TEBA0714 carrier use two Samtec Razor Beam LSHM Connectors on the bottom side.
Include Page |
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| PD:4 x 5 SoM LSHM B2B ConnectorsPD: |
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| 4 x 5 SoM LSHM B2B Connectors |
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Scroll Title |
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit |
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VIN | Input Supply Voltage | -0.3 | 6 | V | T_STR | Storage Temperature | -40 | 85125 | °C |
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Recommended Operating Conditions
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Scroll Title |
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anchor | Figure_TS_PD |
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title | Physical Dimension |
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Scroll Ignore |
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draw.io Diagram |
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border | truefalse |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 1 |
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diagramName | TEBA0714_TS_PD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 | revision | 1 |
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Scroll Only |
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scroll-pdf | true |
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scroll-office | true |
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scroll-chm | true |
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scroll-docbook | true |
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scroll-eclipsehelp | true |
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scroll-epub | true |
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scroll-html | true |
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Scroll Title |
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Changes | Documentation Link |
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2016-06-15 | 01 | | REV01 |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
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