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Board to Board (B2B) I/Os
FPGA bank number and number Number of I/O signals and Interfaces connected to the B2B connector:
Scroll Title |
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| FPGA Bank B2B Connector | Interface | Number of I/O | Notes |
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JM1
| User I/O | 52 Single ended, 27 Differential | - | MGT lanes | 4 Differential, 2 lanes |
| MGT reference clock input | 2 Single ended, 1 Differential |
| JTAG | 4 Single ended |
| SoM control signals | 2 Single ended | PROG_B, DONE | JM2 | User I/O | 36 Single ended or 18 differential | - | SFP+ Interface control signals | 8 Single ended |
| QSPI interface | 6 Single ended |
| UART interface | 2 Single ended |
| User LEDs | 2 Single ended | Red, Green | SoM control signals | 1 Single ended | BOOTMODE |
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anchor | Table_SIP_XMODS2 |
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title | JTAG pins connection |
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S2 | Status | Description | Notes |
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1 | ON | Update Mode JTAG access to SC CPLD only |
| 2 | OFF | Must be in OFF state always |
| 3 | OFF | 3.3V is input | supplied from pin headers externally | 4 | OFF | VIO is input | supplied from pin header externally |
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SFP+ Connector
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anchor | Table_SIP_SFP+ |
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title | SFP+ Connector Information |
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orientation | portrait |
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sortDirection | ASC |
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style | |
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Pin | Connected to | Notes |
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VCCR | 3.3V |
| VCCT | 3.3V |
| VREF | GND |
| TD+/TD- | MGT TX | MGT Lane | RD+/RD- | MGT RX | MGT Lane | TX/FAULT | SFP0_TX_FAUL | SFP_CTRL | TX/DISABLE | SFP0_TX_DIS | SFP_CTRL | MOD-DEF2 | SFP0_SDA | SFP_CTRL | MOD-DEF1 | SFP0_SCL | SFP_CTRL | MOD-DEF0 | SFP0_MT_DEF0 | SFP_CTRL | RS0/RS1 | SFP0_RS0_1 | SFP_CTRL | LOS | SFP0_LOS | SFP_CTRL |
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title | Physical Dimension |
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