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| Scroll Title |
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| anchor | Figure_OV_BD |
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| title | TExxxx block diagram |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | true |
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| diagramName | Figure_OV_BD |
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| simpleViewer | true |
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| width | |
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| links | auto |
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| tbstyle | top |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 1427644 |
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| revision | 1114 |
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| Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed Image Added |
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Main Components
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| Scroll Title |
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| anchor | Figure_OV_MC |
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| title | TExxxx main components |
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| Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
| Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
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- ...
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| draw.io Diagram |
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| border | true |
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| |
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| diagramName | TEM0007_OV_MC |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | top |
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| lbox | true |
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| diagramWidth | 641 |
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| revision | 4 |
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| Scroll Only |
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 Image Added
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- Microsemi Polarfire SoC MPFS250T, U2
- 1 GByte LPDDR4 SDRAM, U6
- Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver, U7
- Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver, U11
- Lattice Semiconductor MachXO2 System Controller CPLD, U1
- B2B Connector Samtec Razor Beam, JM1...3
- EEPROM, U10
- Serial NOR Flash, U3
Initial Delivery State
| Page properties |
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Notes : Only components like EEPROM, QSPI flash can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
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| Scroll Title |
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| anchor | Table_OV_IDS |
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| title | Initial delivery state of programmable devices on the module |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Storage device name | Content | Notes |
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SPI NOR Flash, U4U3 | Not programmed | - | | EEPROM, U17U10 | Pre-programmed globally unique MAC | - | | System Controller CPLD, U1 | Standard firmware | - |
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| Scroll Title |
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| anchor | Table_SIP_B2B |
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| title | General PL SoC I/O to B2B connectors information |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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| 0 | JM2 |
50 | 18 | 1.2 V / 1.35 V / 1.5 V / 1.8 V | HSIO dependent on VCCIOD | | 0 | JM3 | 16 | 1.2 V / 1.35 V / 1.5 V / 1.8 V | HSIO dependent on VCCIOD | | 1 |
JM218| 48 | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
HSIO | GPIO dependent on VCCIOB | | 1 |
JM320| 36 | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
HSIO 262GPIO | | MSSIO (14 signals including UART and SDIO) | | 5 | JM3 | 4 | - | SGMII (1 pairs for TX / 1 pairs for RX) | | 5 |
SERDES | JM3 | 16 | - | SERDES (4 pairs for TX / 4 pairs for RX) | | 5 | JM3 | 4 | - | SERDES CLK (2 pairs for RX) |
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JTAG Interface
JTAG access to the TEM0006 SoM through B2B connector JM2.
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