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TE0630 Spartan-6 Module
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Trenz Electronic Documentation
TE0630 User Manual
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TE0630 User Manual
TE0630 Resources
TE0630 Overview
TE0630 Getting Started
TE0630 Technical Specification
TE0630 Detailed Description
Porting a TE0300 desing to TE0630
TE0630 Known Issues
TE0630 References
Legal Notices
TE0630 Product Change Notifications
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TE0630 User Manual
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changes.mady.by.user
Sergio Pavesi
Saved on
16 08, 2013
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changes.mady.by.user
Sergio Pavesi
Saved on
28 08, 2013
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Features
High-density plug-in
Xilinx Spartan-6
module
USB 2.0 interface
with high-speed (480 Mbit/s) data rate
Large
SPI Flash
for configuration and user data, accessible via FPGA, JTAG and USB interfaces
Large
DDR3 SDRAM
FPGA configuration via
SPI, JTAG or USB
3 high-efficiency on-board switch-mode
DC-DC converters
Power supply from B2B connector (carrier board) or USB connector
Flexible expansion via high-density
shockproof B2B
connectors
Most user I/Os on B2B connectors routed as
LVDS pairs
Evenly spread supply pins for good signal integrity
Industrial temperature grade
available upon request
Low-cost, versatile and ruggedized design
Small size
Specifications
FPGA
- XC6SLX45/75/100/150-2CSG484C(I)
USB-controller
: CY7C68013A-56LTXC(I)
Non-volatile memory
: 64 Mbit SPI Flash for configuration and user data
Volatile memory
: 1 Gb x 16 DDR3 SDRAM
Up to
110 FPGA user I/O
Supply voltage range: 4.0 V - 5.5 V
1 user push-button
4 user LEDs
2 user DIP switches
Dimensions:
40.5 mm x 47.5 mm
Table of Contents
1 Technical Specifications4
1.1 Module options4
1.2 Dimensions4
2 Detailed Description5
2.1 Block Diagram5
2.2 Power Supply5
2.2.1 Supply from B2B Connector5
2.2.2 Supply from USB Connector5
2.2.3 On-board Power Rails6
2.2.4 Power-on Reset7
2.3 FPGA User I/Os8
2.4 Board-to-board Connectors9
2.5 USB Connector10
2.6 JTAG connector11
2.7 Serial EEPROM11
2.8 SPI Flash11
2.9 DDR3 SDRAM12
2.10 USB Controller12
2.11 Clock Oscillators13
2.12 LEDs13
2.13 Push-Button14
2.14 DIP Switch14
2.15 Board revisions and assembly variants14
3 TE0300 compatibility15
3.1 Mechanical compatibility15
3.2 Electrical compatibility15
4 Module Configuration17
4.1 JTAG FPGA Configuration17
4.2 SPI FPGA Configuration18
4.3 eFUSE programming18
4.4 EZ-USB FX2 Firmware Programming18
4.5 EZ-USB FX2 EEPROM Programming19
5 USB Drivers Installation21
5.1 Generic Driver21
5.2 Dedicated Driver24
6 B2B Connectors Pin Descriptions26
6.1 Pin Labelling27
6.2 Pin Types27
6.3 J4 Pin-out28
6.4 J5 Pin-out29
6.5 Signal Integrity Considerations30
7 Related Materials and References30
7.1 Data Sheets30
7.2 User Guides30
8 Glossary of Abbreviations and Acronyms30
9 Legal Notices31
9.1 Document Warranty31
9.2 Limitation of Liability31
9.3 Copyright Notice31
9.4 Technology Licenses32
10 Environmental Protection33
10.1 REACH (Registration, Evaluation, Authorisation and Restriction of Chemicals) Compliance Statement33
10.2 RoHS (Restriction of Hazardous Substances) compliance statement33
10.3 WEEE (Waste Electrical and Electronic Equipment)33
[ Appendix A. Indirect SPI Programming using iMPACT35|#_
RefHeading
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[ Document Change History39|#_
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