Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

MB Commands require the XPS_I2C_SLAVE custom IP block and a proper FX2 interrupt handler (i2c_slave_int_handler() function in interrupt.c running on MicroBlaze); the FX2 interrupt handler is called to handle the signal interrupt xps_i2c_slave_0_IP2INTC_Irpt. The i2c_slave_int_handler() function actually execute the I2C delivered MB Command; when MicroBlaze's software wants to send information to the host computer (through USB FX2 microcontroller), it should write MB2FX2_REGs of XPS_I2C_SLAVE custom IP block. The IP block will rise a interrupt (USB_INT => INT0) at pin INT0. The FX2 microcontroller will manage the interrupt (INT0=1 => FPGA_INT0=1) and could read the register of XPS_I2C_SLAVE custom IP block.

INT0 and INT1 pins

The pin INT0 (FPGA_INT0) is defined in the file fpga.h of firmware. INT0 is defined as an output for the FPGA but as an input for FX2 USB microcontroller (by default ; see "table 10 FX2LP Pin Descriptions" of the document "EZ-USB® FX2LP™ USB Microcontroller High-Speed USB Peripheral Controller" (link))

 The pin INT1 (FPGA_INT1) is defined in the file fpga.h of firmware. INT1 is defined as an input for the FPGA but as an output for FX2 USB microcontroller .

Code Block
languagecpp
titlesystem_init() function used in fw.c
// PORTACFG: FLAGD SLCS(*) 0 0 0 0 INT1 INT0
//               1       1 0 0 0 0    0    0
PORTACFG = 0xC0; //Bits PORTACFG.7 and PORTACFG.6 both affect pin PA7. If both bits are set, FLAGD takes precedence.
SYNCDELAY; // (delay maybe not needed)
...
OEA = 0x82; //FlagD and INT1 as outputs => 0b10000010 => PA7,PA1 pins output enabled;