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Scroll Title
titleFPGA SPI Configuration Interface (CONTROL/STATUS) Pins: PD[3:0] for every TE USB FX2 module


Section
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Column
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Pin Name
Schematic

Pin Name FPGA
FPGA Direction

Pin Name FX2
FX2 direction

Description

During Configuration

After Configuration

FX2_PS_ENNOT

CONNECTED

PD0

Bidirectional
Input/Output (3)

Control of signal PS_EN
if the switch FX2_ON is


set to on.

Some power rails are controlled

controlled

by the USB

FX2
microcontroller (FX2 μC)

FX2  microcontroller.
At start-up,

the 

the FX2

μC

microcontroller
switches off some power


rails and
starts up the


module in low-power
mode.
After enumeration,
the


FX2 microcontroller firmware
enables (switches on) the power

power

rails previously


disabled, if enough
current


is available
from the USB bus.

See  Power Rails


Configuration:

If the switch FX2_ON
is


set to on, FX2_PS_EN
should be High


to allow
configuration


to start.
 

If the switch FX2_ON is
set to on,
FX2_PS_EN
should be High to allow
the various components
of TE USB FX2
module


to work.

FX2_PROG_B

PROGRAM_B
( TE0630's
Spartan 6) 

PROG_B
(TE0300's
Spartan 3E)
(TE0320's
Spartan 3A)

Input

PD1

Bidirectional

Input/Output (3)


 

 

Program FPGA. Active Low.

Active-Low asynchronous


full-chip
reset.

When asserted Low for


500 ns
or longer,


forces the FPGA


to restart
its configuration


process by clearing
configuration memory and resetting

resetting

the DONE and


INIT_B pins after
FX2_PROG_B returns High.

Must be High to allow
configuration to start.

Drive FX2_PROG_B Low

Low

and release to reprogram

reprogram

FPGA.

Hold FX2_PROG_B


to force
the FPGA I/O


pins into
High-Z, 


allowing direct
programming
access to SPI flash

Flash

PROM pins.


 

DONE

DONE

Bidirectional I/O,

Open-Drain,
or Active

Use a pull-up

resistor /330Ω)
on DONE (4)
resistor
on DONE (4).
The recommendation
for DONE in the
User Guide
is to use a 330Ω
pull-up.


 


 

PD2

Input,
by default (2)

Dedicated Active-High signal
indicating configuration is


complete:

  • 0 = FPGA not configured
  • 1 = FPGA configured
Refer to the BitGen section of
of
UG628, Command Line Tools
Tools
User Guide for

software settings.

See FPGA configuration
process successfully
completes (DONE PIN)

page.

The FX2

μC

microcontroller's
firwmare


is able to read the
DONE PIN status from

from

PD2 pin (IOD2)


and the host
computer's SW could

could

obtain the


current value
using
READ_STATUS command.
 
DONE PIN status


can be
read from


reply[4]


(= 
EP1INBUF[4] =


sts_booting
=


FPGA_DONE).


INIT_B

INIT_B
Open-drain
bidirectional I/O
Use a pull-up

resistor (4.7kΩ)
on INIT_B (4)
resistor
on INIT_B (4).
The recommendation
for INIT in the User
Guide is to use a
4.7kΩ pull-up.

PD3

Input,
by default (2)

See AR# 39582 and


 

Initialization Indicator.
Active Low.
Goes Low at start of configuration
configuration
during

Initialization memory
clearing process.

Released at end
of memory

ofmemory clearing, when mode
select

pins are sampled.

The INIT pin does not have


a rise
time requirement and


is


used to
signal the start of


configuration as
well as a


CRC,


and can also be
used as


User-IO post configuration.

 

Active during
configuration.
Before the Mode pins are
are
sampled,

INIT_B is an input
that

can be held
Low to delay configuration.
If SPI Flash PROM requires
more than 2 ms to awake
after powering
on,hold INIT_B Low until
PROM is ready
.
.
After the Mode pins are
sampled, INIT_B is an
open-drain active-Low output
output
indicating whether a CRC
CRC
error occurred during
configuration:
  • 0= CRC error
  • 1= No CRC error
User I/O. If unused in the
the
application, drive
INIT_B High to avoid a
a
floating value.
Dual-Purpose:
if User I/O if

POST_CRC
is not enabled.

 

 

 

Note
Only the status of these PD2 pin (FPGA_DONE) could be retrieved using the READ_STATUS command. If the user desire to retrieve the status of the other pins as well, he/she should modify the firmware to add another FW API similar to READ_STATUS command. Theoretically the user/developer should add another case in the switch construction inside the function ep1_pool(void) (described in te_api.c).

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