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Besides standard IP cores, the reference architecture contains three custom IP cores :(aka reference IP custom block).

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title Reference IP custom blocks dependencies and connections
custom IP core block brief description is used to deliver MB Command to FPGA's MicroBlaze soft μP (through FX22MB_REGs) and retrieve "reply" (through MB2FX2_REGs) is used to realize a FPGA  ↔ FX2 μC connection is used to realize a FPGA  ↔ DRAM connection XPS_I2C_SLAVE forwards MicroBlaze API Commands (MB Commands) coming from the USB bus towards the MicroBlaze (trough I2C) XPS_NPI_DMA custom DMA between DDR SDRAM and other multiple sources; XPS_FX2 used for high speed bidirectional communication between the FPGA and a host computer (also USB host) (trough a 8 bit bus)

Legend:

• this symbol means that the custom IP block is used to (description in the corresponding colums)
• this symbol means that the custom IP block is NOT used to (description in the corresponding colums)

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