Title: Logic Architecture Layer (Generation 2 = Generation 3): FPGA image  
Author: Thorsten Trenz 10 04, 2013
Last Changed by: Sergio Pavesi 14 11, 2013
Tiny Link: (useful for email) https://wiki.trenz-electronic.de/x/t4E6
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Incoming Links
TE0630 Spartan-6 Module (2)
    Page: TE0630 Getting Started
    Page: TE0630 USB Interface
TE0300 Spartan-3E Module (2)
    Page: TE0300 USB Interface
    Page: TE0300 Getting Started
TE USB Suite (3)
    Page: TE USB FX2 Module Configuration
    Page: Preloaded Logic Architecture Layer (in SPI Flash): Reference Architecture Layer description
    Page: TE USB FX2 module IIC Bus: it is used for firmware and MB Commands
TE0320 Spartan-3A DSP Module (2)
    Page: TE0320 USB Interface
    Page: TE0320 Getting Started
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