changes.mady.by.user Sergio Pavesi
Saved on 14 11, 2013
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Maximal supported bandwidth is normally limited by
Pin Name
If the custom IP blocks
XPS_FX2 (FX2 microcontroller ↔ FPGA) and
XPS_NPI_DMA (FPGA ↔ DRAM memory)
and MicroBlaze API Commands (MB Commands)
FX22MB_REG0_START_RX command (or derived work)
FX22MB_REG0_START_TX command (or derived work)
FX22MB_REG0_STOP command (or derived work)
are used, data bytes array could be transfered between