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1. Plug the TE0835 module on the TEB0835 carrier board
2. Connect the micro USB cable to the J29 connector
3. Plug the power supply cable to the J19 connector
4. Plug the prepared SD card on the SD card socket (J28)
5. Connect a cable with SMA or SMT connector to one of the DAC connector( for example DAC0 J9) and feed it back to the related ADC input (for example ADC0 J1)
6. (optional) A signal generator can be used to feed desired sinal to ADC input.
7. (optional) An oscilloscope can be used to monitor the output signal of DAC.

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1. Prepare HW like described on section TE0835 Test Board#Programming
2. Connect UART USB (most cases same as JTAG)
3. Select SD Card as Boot Mode (or QSPI - depending on step 1)
   Note: See TRM of the Carrier, which is used.
4. Power On PCB
   Note: 1. Zynqmp Zynqmp RFSoC Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR
5. Open the RF Analyzer GUI
6. Click on Connect
7. Adjust the desired JTAG frequency (for example 30MHZ)
8. Give the generated bitstream file path
9. Click on Download Bitstream on the FPGA
10. When downloading is the downloading finished, click on Select Target
11. After the initilalisation, all ADCs/DACs tile tiles are visible
12. Click the on desired DAC tile and choose a DAC (for example DAC0)
13. Adjust the desired DAC property properties (for example output frequency)
14. Click on Generation Generate to generate the signal in output of DAC
15. Click on the related ADC tile and choose the related ADC (for example ADC0)
16. Click on Acquisition Acquire to aqcuire the input signal
17. The spectum of the DAC output signal can be seen now. The signal can be visible in time domain too.
    1. Tip: In Window menu click on Multiview to see all of DACs and ADCs simultaneously.

Linux

1. Open Serial Console (e.g. putty)
   
   1. Speed: 115200
   2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
2. Linux Console:
   Note: Wait until Linux boot finished For Linux Login use:
   
   1. User Name: root
   2. Password: root
3. You can use Linux shell now.
   1. I2C 0 Bus type: i2cdetect -y -r 0
   2. I2C 1 Bus type: i2cdetect -y -r 1
   3. RTC check: dmesg | grep rtc
   4. ETH0 works with udhcpc
   5. USB type  "lsusb" or connect USB2.0 device
4. Option Features
   1. Webserver to get access to Zynqmp RFSoC
      
      1. insert IP on web browser to start web interface
   2. init.sh scripts
      1. add init.sh script on SD, content will be load automatically on startup (template included in ./misc/SD)
         

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Template location: ./sw_lib/sw_apps/

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Software Design -  PetaLinux

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

• Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
• Add Files:  te_xfsbl_hooks.h/.c (for hooks and board)\n\
• General Changes: 
  
  • Display FSBL Banner and Device Name

Module Specific:

• Add Files: all TE Files start with te_*
  
  • Si5395 on the RFSoC module configuration
  • Si5395 on the TEB0835 carrier board configuration
  • ETH+OTG Reset over MIO

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

• Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
• General Changes:
  
  •  Display FSBL Banner
  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

zynqmp_pmufw

Xilinx default PMU firmware.

hello_te0835

Hello TE0835 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. Vitis  is used to generate Boot.bin.

Software Design -  PetaLinux

For PetaLinux installation and  project creation, follow instructions from:

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Webserver application accemble for Zynqmp RFSoC access. Need busybox-httpd

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