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| Scroll Title |
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| anchor | Table_HWM |
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| title | Hardware Modules |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
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| TE0835-0102-MXE21-A | 25dr_1e_4gb | REV1REV2 | 4GB | 128MB | NA | NA | NA |
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Design supports following carriers:
| Scroll Title |
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| anchor | Table_HWC |
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| title | Hardware Carrier |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
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| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Carrier Model | Notes |
|---|
| TEB0835- |
01
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Additional HW Requirements:
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- Prepare HW like described on section TE0835 Test Board#Hardware Setup
- Connect UART USB (most cases same as JTAG)
- Select SD Card as Boot Mode (or QSPI - depending on step 1)
Note: See TRM of the Carrier, which is used. - Power On PCB
Note: 1. Zynqmp RFSoC Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR - Open the RF Analyzer GUI
- Click on Connect
- Adjust the desired JTAG frequency (for example 30MHZ)
- Give the generated bitstream file path
- Click on Download Bitstream on the FPGA
- When downloading is finished, click on Select Target
- After the initilalisation, all ADCs/DACs tiles are visible
- Click on desired DAC tile and choose a DAC (for example DAC0)
- Adjust the desired DAC properties (for example output frequency)
- Click on Generate to generate the signal in output of DAC
- Click on the related ADC tile and choose the related ADC (for example ADC0)
- Click on Acquire to aqcuire the input signal
- The spectum of the DAC output signal can be seen now. The signal can be visible in time domain too.
- Tip: In menu Window click on Multiview to see all of DACs and ADCs simultaneously.
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Linux
- Open Serial Console (e.g. putty)
- Speed: 115200
- COM Port: Win OS, see device manager, Linux OS see dmesg |grep tty (UART is *USB1)
- Linux Console:
Note: Wait until Linux boot finished For Linux Login use:
- User Name: root
- Password: root
- You can use Linux shell now.
- I2C 0 Bus type: i2cdetect -y -r 0
- I2C 1 Bus type: i2cdetect -y -r 1
- RTC check: dmesg | grep rtc
- ETH0 works with udhcpc
- USB type "lsusb" or connect USB2.0 device
- Option Features
- Webserver to get access to Zynqmp RFSoC
- insert IP on web browser to start web interface
- init.sh scripts
- add init.sh script on SD, content will be load automatically on startup (template included in ./misc/SD)
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| Scroll Title |
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| anchor | Figure_VHM |
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| title | Vivado Hardware Manager |
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System Design - Vivado
Block Design
| Scroll Title |
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| anchor | Figure_BD |
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title |
Block Design
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PS Interfaces
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