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Excerpt
  • Vitis/Vivado 2019.2
  • PetaLinux
  • RF Analyzer 1.6
  • PCIe (endpoint)
  • SD
  • ETH
  • USB
  • I2C
  • RTC
  • FMeter
  • Modified FSBL for SI5395 programming
  • Special FSBL for QSPI programming

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Scroll Title
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titleAdditional Hardware

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Additional HardwareNotes
Micro USB Cable for JTAG/UART
CoolerIt's recommended to use cooler on Zynqmp RFSoC  device
SMA male connector cableSome ADC inputs/DAC outouts have the SMA connector
UFL female connector cableSome ADC inputs/DAC outouts have the UFL connector
Ethernet cable
SD card16GB
Signal generator (optional)To feed a desired signal to the input of ADC
Oscilloscope (optional)To monitor the output signal of DACs.
PCwith ATX Powrer supply and PCIe X? slot12V power supplyIt is recommended to use a power supply with 3A output current capability 


Content

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Notes :

  • content of the zip file

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Software Setup

Download RF Analyzer GUI from the following link and install it.

Design Flow

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  • Basic Design Steps

  • Add/ Remove project specific description

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JTAG

Not used on this Example.

Usage

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Hardware Setup

The Hardware contains of a TE0835 module and TEB0835 carrier board and has 8 ADC inputs and 8 DAC outputs.

  1. Plug the TE0835 module on the TEB0835 carrier board
  2. Install the cooler on the RFSoC
  3. Connect the micro USB cable to the J29 connector
  4. Plug the 12V power supply cable to the J19 connector
  5. Plug the prepared SD card on the SD card socket (J28)
  6. Connect a cable with SMA or UFL connector to one of the DAC connector( for example DAC0 J9) and feed it back to the related ADC input (for example ADC0 J1)
  7. (optional) A signal generator can be used to feed desired sinal to ADC input.
  8. (optional) An oscilloscope can be used to monitor the output signal of DAC.

Usage

  1. Prepare HW like described on section TE0835 Test Board#Hardware Setup
  2. Connect UART USB (most cases
  3. Prepare HW like described on section TE0835 Test Board#Hardware Setup
  4. Connect UART USB (most cases same as JTAG)
  5. Select SD Card as Boot Mode (or QSPI - depending on step 1)
    Note: See TRM of the Carrier, which is used.
  6. Power On PCB
    Note: 1. Zynqmp RFSoC Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR

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  1. Open Serial Console (e.g. putty)
    1. Speed: 115200
    2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
  2. Linux Console:
    Note: Wait until Linux boot finished For Linux Login use:
    1. User Name: root
    2. Password: root
  3. You can use Linux shell now.
    1. I2C 0 Bus type: i2cdetect -y -r 0
        I2C 1 Bus type: i2cdetect -y -r 1
        1. Bus 0 up to 5 possible
      1. RTC check: dmesg | grep rtc
      2. ETH0 works with udhcpc
      3. USB type  "lsusb" or connect USB2.0 device
      4. PCIe Bus type: "lspci"
        1. PCIe device should be seen in the console 
    2. Option Features
      1. Webserver to get access to Zynqmp RFSoC
        1. insert IP on web browser to start web interface
      2. init.sh scripts
        1. add init.sh script on SD, content will be load automatically on startup (template included in ./misc/SD)

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    Scroll Title
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    titleVivado Hardware Manager

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    RF Analyzer

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    1. Open the RF Analyzer GUI

    Hardware Setup

    The Hardware contains of a TE0835 module and TEB0835 carrier board and has 8 ADC inputs and 8 DAC outputs.

    1. Plug the TE0835 module on the TEB0835 carrier board
    2. Install the cooler on the RFSoC
    3. Connect the micro USB cable to the J29 connector
    4. Plug the 12V power supply cable to the J19 connector
    5. Plug the prepared SD card on the SD card socket (J28)
    6. Connect a cable with SMA or UFL connector to one of the DAC connector( for example DAC0 J9) and feed it back to the related ADC input (for example ADC0 J1)
    7. (optional) A signal generator can be used to feed desired sinal to ADC input.
    8. (optional) An oscilloscope can be used to monitor the output signal of DAC.
    1. Click on Connect
    2. Adjust the desired JTAG frequency (for example 30MHZ)
    3. Give the generated bitstream file path
    4. Click on Download Bitstream on the FPGA
    5. When downloading is finished, click on Select Target
    6. After the initilalisation, all ADCs/DACs tiles are visible
    7. Click on desired DAC tile and choose a DAC (for example DAC0)
    8. Adjust the desired DAC properties (for example output frequency)
    9. Click on Generate to generate the signal in output of DAC
    10. Click on the related ADC tile and choose the related ADC (for example ADC0)
    11. Click on Acquire to aqcuire the input signal
    12. The spectum of the DAC output signal can be seen now. The signal can be visible in time domain too.
      1. Tip: In menu Window click on Multiview to see all of DACs and ADCs simultaneously.


    RF Analyzer GUIBoard TE0835 ( RFSoC U1)
    		TEB0835
    TileADC/DACSoC Pin NameSoC Pin NumberB2BSignal NameConnector DesignatorConnector Type
    RF Analyzer GUIADC/DACBoardDesignatorPin NamePin NumberConnected withBoardPin NameDesignatorFootprint
    ADC Tile 0ADC 01
    TE0835U1
    ADC0_P/ADC0_NAK2/AK1B2B
    TEB0835
    ADC0_P/ADC0_NJ1SMA
    ADC Tile 0ADC 23
    TE0835U1
    ADC1_P/ADC1_NAH2/AH1B2B
    TEB0835
    ADC1_P/ADC1_NJ2UFL
    ADC Tile 1ADC 01
    TE0835U1
    ADC2_P/ADC2_NAF2/AF1B2B
    TEB0835
    ADC2_P/ADC2_NJ3SMA
    ADC Tile 1ADC 23
    TE0835U1
    ADC3_P/ADC3_NAD2/AD1B2B
    TEB0835
    ADC3_P/ADC3_NJ4UFL
    ADC Tile 2ADC 01
    TE0835U1
    ADC4_P/ADC4_NAB2/AB1B2B
    TEB0835
    ADC4_P/ADC4_NJ5SMA
    ADC Tile 2ADC 23
    TE0835U1
    ADC5_P/ADC5_NY2/Y1B2B
    TEB0835
    ADC5_P/ADC5_NJ6UFL
    ADC Tile 3ADC 01
    TE0835U1
    ADC6_P/ADC6_NV2/V1B2B
    TEB0835
    ADC6_P/ADC6_NJ7SMA
    ADC Tile 3ADC 23
    TE0835U1
    ADC7_P/ADC7_NT2/T1B2B
    TEB0835
    ADC7_P/ADC7_NJ8UFL
    DAC Tile 0DAC 0
    TE0835
    U1
    DAC0_P/DAC0_NN2/N1B2B
    TEB0835
    DAC0_P/DAC0_NJ9SMA
    DAC Tile 0DAC 1
    TE0835U1
    DAC1_P/DAC1_NL2/L1B2B
    TEB0835
    DAC1_P/DAC1_NJ10UFL
    DAC Tile 0DAC 2
    TE0835U1
    DAC2_P/DAC2_NJ2/J1B2B
    TEB0835
    DAC2_P/DAC2_NJ11SMA
    DAC Tile 0DAC 3
    TE0835U1
    DAC3_P/DAC3_NG2/G1B2B
    TEB0835
    DAC3_P/DAC3_NJ12UFL
    DAC Tile 1DAC 0
    TE0835
    U1
    DAC4_P/DAC4_NE2/E1B2B
    TEB0835
    DAC4_P/DAC4_NJ13UFL
    DAC Tile 1DAC 1
    TE0835U1
    DAC5_P/DAC5_NC2/C1B2B
    TEB0835
    DAC5_P/DAC5_NJ14UFL
    DAC Tile 1DAC 2
    TE0835U1
    DAC6_P/DAC6_NB4/A4B2B
    TEB0835
    DAC6_P/DAC6_NJ15UFL
    DAC Tile 1DAC 3
    TE0835
    U1
    DAC7_P/DAC7_NB6/A6B2B
    TEB0835
    DAC7_P/DAC7_NJ16UFL

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    Scroll Title
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    titleOverview

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