Page History

...

Now we only need to assign the CLK and LED ports to proper FPGA pins, and we are ready to generate a bitfile that would blink a LED!

We can either assign the CLK and LED in the I/O Window that can be opened when we open elaborated design, or we can create a new constraint file, and execute a TCL script that well just writes the same constraints into the XDC 

set_property package_pin A8 [get_ports LED]
set_property iostandard LVCMOS18 [get_ports [list LED]]
set_property package_pin F4 [get_ports CLK]
set_property iostandard LVCMOS15 [get_ports [list CLK]]

The above would set correct ports and I/O Standards to blink a LED on TE0710-01 Artix board. For any other target hardware the mappings would be different.

So simple it is.

To create Vivado projects that can be shared.

...