Page History
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| Storage device name | Content | Notes |
|---|---|---|
User configuration EEPROMs with MAC address (1x Microchip 24LC128-I/ST, 3x Microchip 24AA025E48T-I/OT) | Not programmed | available since PCB REV02 |
SPI Flash main array | Not programmed | - |
eFUSE Security | Not programmed | - |
| Si5338A programmable PLL NVM OTP | Not programmed- | Only vilatile memory is progammable of field. NVM can't be programm on field. Custom assembly variant with preprogrammed NVM is possible on request |
Table 1: Initial Delivery State of the flash memories
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| 22-02-08 | v.46 | John Hartfiel |
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| 2021-05-17 | v.41 | John Hartfiel |
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| 2021-03-11 | v.40 | John Hartfiel |
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| 2019-07-15 | v.36 | John Hartfiel |
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| 2019-07-02 | v.35 | John Hartfiel |
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| 2019-06-19 | v.33 | John Hartfiel |
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2018-08-20 | v.29 | John Hartfiel |
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2018-08-06 | v.28 | John Hartfiel |
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| 2017-11-13 | v.23 | Ali Naseri |
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2017-11-13 | v.19 | John Hartfiel |
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| 2017-10-19 | v.18 | John Hartfiel |
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| 2017-08-15 | v.17 | Vitali Tsiukala |
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2017-08-07 | v.14 | Jan Kumann |
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2017-05-17 | V.4 | Ali Naseri | Current TRM release. | ||||||||||||||||||||||||
| 2017-05-10 | v.1 | Ali Naseri | Initial document. |
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