Page History
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Affected Product | Replacement |
---|---|
TE0726-03-41I64-A | TE0726-04-41I94-A |
TE0726-03-41C64-A | TE0726-04-41C94-A |
TE0726-03-11C64-A | - |
TE0726-03-41C74-Q | - |
TE0726-03-41C74-R | - |
Changes
#1 Changed DCDC
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(U16, U17, U19, U20) from EN5311QI to MPM3834CGPA and adapted power circuit.
Type: Schematic Change
Reason: EOL of Component.
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Impact: Enable DDR3L ECC functionality. Firmware reflects it but custom firmware needs to be updated by customer.
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#6 Changed power-up sequencing.
Type: Schematic Change
Reason: Improved power-on sequence.
Impact: None. Updated power sequence.
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#7 Added DIP switch (S1) and resistor (R152) to enable JTAG only boot mode.
Type: Schematic Change
Reason: QSPI programming problems with newer Vivado versions.
Impact: None. JTAG boot mode directly accessible. Fix QSPI programming problems with newer Vivado versions according to AR#00002 - QSPI Programming issues.
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#8 Added 499 Ohm resistor (R162) and changed value for resistor (R141) from 2.61 kOhm to 499 Ohm to use signal "PUDC" as dual-purpose signal.
Type: Schematic Change
Reason: Enable dual-use option for signal "PUDC".
Impact: None. Firmware reflects it but custom firmware needs to be updated by customer.
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#9 Changed HDMI CEC circuit (R140, D5) and removed HDMI CEC functionality via not assembled resistors (R140, R42), capacitor (C127) and diode (D5) and completely removed ferrid bead (L11).
Type: Schematic Change
Reason: Improve HDMI functionality.
Impact: If HDMI CEC is used in customer firmware, firmware needs to be modified or components needs to be assembled.
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#10 Added diode (D7) and resistors (R155, R160) for voltage level translation for signal "DONE_LV" at CPLD (U11) to signal "DONE" at FPGA (U1).
Type: Schematic Change
Reason: Improve signal voltage level.
Impact: None.
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#11 Added MIC bias power circuit (L12, C114, R151).
Type: Schematic Change
Reason: Increase Alternative microphones usable microphones.
Impact: None. More Alternative microphones are usable. Minor changes in electrical characteristics.
#11 Connected FTDI (U3) pin ADBUS4 to signal "TCK" via resistor (R172).
Type: Schematic Change
Reason: JTAG programming improvement.
Impact: None.
#12 Changed common mode filter SP5001-04TTG (D8, D9) to EMI8042MUTAG.
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Impact: None. Minor changes in electrical characteristics.
#13 Changed ferrid bead
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(L1...L4, L6, L7, L9, L10) from BKP0603HS121-T to MPZ0603S121HT000.
Type: Schematic Change
Reason: EOL of Component.
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Reason: BOM Optimization.
Impact: None.
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#15 Changed resistors (R80, R81, R82) from 1.43 kOhm to 10 kOhm.
Type: Schematic Change
Reason: BOM Optimization.
Impact: None.
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#16 Changed testpoint size from 0.8 mm to 1 mm diameter for testpoints (TP2, TP4, TP6, TP8...TP14).
Type: PCB Change
Reason: Use similar testpoints size for all testpoints.
Impact: None.
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#17 Added testpoints TP15...TP20.
Type: PCB Change
Reason: Improve signal monitoring.
Impact: None.
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#18 Changed fiducials to standard fiducial type.
Type: Schematic Change
Reason: Use standard fiducials.
Impact: None.
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#19 Renamed signal name from "SPI-DQ0/M0" to "SPI-DQ0/M3".
Type: Schematic Change
Reason: Use AMD boot mode name convention.
Impact: None.
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#20 Renamed signal name from "SPI-DQ3/M3" to "SPI-DQ3/M0".
Type: Schematic Change
Reason: Use AMD boot mode name convention.
Impact: None.
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#21 Added legal notices, revision history, block and power diagram. Updated page count and order.
Type: Documentation Update
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