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Note the XADC capable pins are not routed differentially to the B2B connector. The performance and usability of the XADC must be evaluated.

SBC

SBC - System Basis Chip MC33908

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Note: the availability LIN depends on the Module version and assembly option.

Ethernet

There are two 100Mbit Extreme Temperature Ethernet PHY's DP83848YB on the board. Datasheet is available from TI, Literature number SNLS208H. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25MHz source is provided from MEMS Oscillator. All LED outputs have on-board pull-ups. Outputs to Magnetics have also required termination resistors on board.

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