Page History
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| Name | Note |
|---|---|
| NRST | |
| NRST_IN |
Boot Modes
By default the TE-0729 supports QSPI-Flash-Memory, JTAG and SD-Card (if available on base board) boot modesTE0729 supports primary boot from
- JTAG
- SPI Flash
- SD Card
Boot from on-board eMMC is also supported as secondary boot (FSBL must be loaded from SPI Flash).
The boot modes are controlled by the Pins 'BOOT1' and 'BOOT2' on the board to board (B2B) connector.
Pin-StateBOOTMODE1BOOTMODE1 / | BOOTMODE2 | boot Boot mode |
|---|---|---|
| LOW / | LOW | |
| LOW / | HIGH | |
| HIGH / | LOW | |
| HIGH / | HIGH |
JTAG
JTAG access to the Xilinx Zynq-7000 device is provided by connector J2.
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| Peripheral | IC | Designator | PS | MIO | Notes |
|---|---|---|---|---|---|
| EEPROM I2C | 24AA025E48T-I/OT | U8 | I2C0 | MIO10, MIO11 | MAC1-AdressMAC Address |
| EEPROM I2C | 24AA025E48T-I/OT | U9 | I2C0 | MIO10, MIO11 | MAC2-AdressMAC Address |
| EEPROM I2C | 24AA025E48T-I/OT | U20 | I2C0 | MIO10, MIO11 | MAC3-AdressMAC Address |
| RTC | ISL12020MIRZ | U22 | I2C0 | MIO10, MIO11 | Temperature compensated real time clock |
| RTC Interrupt | ISL12020MIRZ | U22 | GPIO | MIO46 | Real Time Clock Interrupt |
| SPI Flash | S25FL256SAGBHI20 | U13 | QSPI0 | MIO1..MIO6 | |
| Ethernet0 10/100/1000 Mbps PHY | 88E1512-A0-NNP2I000 | U3 | ETH0 | MIO16...MIO27 | |
| Ethernet0 10/100/1000 Mbps PHY Reset | GPIO | MIO51 | |||
| Ethernet1 10/100 Mbps PHY | KSZ8081MLXCA | U17 | - | (EMIO) | |
| Ethernet1 10/100 Mbps PHY Reset | - | (EMIO) | |||
| Ethernet2 10/100 Mbps PHY | KSZ8081MLXCA | U19 | - | (EMIO) | |
| Ethernet2 10/100 Mbps PHY Reset | - | (EMIO) | |||
| USB | USB3320C-EZK | U11 | USB0 | MIO28...MIO39 | |
| USB Reset | GPIO | MIO49 | |||
| e-MMC (embedded e-MMC) | MTFC4GMVEA-4M IT | U5 | SDIO0 | MIO40...MIO45 | depending on state of pin MIO48 'SEL_SD' |
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Overview
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