Page History
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Bank | Type | B2B | IO count | IO Voltage | Notes | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
500 | MIO | J2-87 J2-88 | 2 | 3,3 V | MIO0, MIO9 | ||||||||||
10 | HR | J3 | 44 | user | 22 LVDS-pairs possible | ||||||||||
11 | HR | J3 | 40 | user | 20 LVDS-pairs possible | ||||||||||
12 | HR | J2 | 40 | user | 20 LVDS-pairs possible | 500 | MIO | J2-93 J2-95 J2-94 J2-96 | 4 | 3,3 V | configured as I2C1 and USART0 by default, configurable as GPIO by user | ||||
13 | HR | J1J2 | 4840 | user | 20 LVDS-pairs possible | ||||||||||
33 | HR | J1 | 48 | user | 23 LVDS-pairs possible | ||||||||||
34 | 35HR | J2 | 30 | 3,3 V | 42 | user | 20 LVDS-pairs possible | 34 | GPIO | J2 | 10 | 2,5 V | configured as DISP_RX by default, configurable as GPIO by user |
For detailed information about the pin out, please refer to the Master Pinout Table.
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