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Table of Contents

Table of Contents

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Trenz Electronic TE0728 is an automotive-grade FPGA module integrating an Automotive Xilinx  Zynq-7 FPGA, two 100 Mbit Ethernet transceivers (PHY) , DDR3L SDRAMDDR3 SDRAM, QSPI Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips. 

...

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    • Note:
  • Xilinx
  • XA7Z020
  • XC7Z020-1CLG484Q (Automotive) [XA7Z014S is available on other assembly options]
    • Rugged for shock and high vibration
    • Dimensions: 6 x 6 cm
    • Temperature range: Automotive
      • Package: CL/CLG484
      • Speed Grade: -1
      • Temperature Grade: Expanded (-40 to +128 °C)
    • Dual-Core ARM Cortex-A9 MPCore
    • 2 x 100 MBit Ethernet transceiver (PHY)
    • DDR3L SDRAM, 16-bit-width [different size is
    • DDR3 SDRAM, up to 512MB, up to 1066 Mb/s, connected to PS  [different size is available on other assembly options]
    • QSPI Flash memory (with XiP support) [different size is available on other assembly options]
    • Programmable SIT8918A , PS clock generator
    • 2 Kbit serial EEPROM
    • Three user LEDs
    • CAN transceiver (PHY)
    • Temperature compensated RTC (real-time clock)
    • 2 x 100 MBit Ethernet transceiver (PHY)
    • Board to Board (B2B)
      • Plug-on module with 3 x 80-pin Samtec Micro Tiger Eye(TM) high-speed connectors
    • 76 single ended
    • I/O
    • , 24 LVDS pairs (48 I/O) and 42 MIO available on board-to-board connectorsCAN transceiver (PHY)
    • Interface
      • 42x MIO
      • 200x HR
      • 128x PS IO
      • 0x GTP Transceiver
      • 0x GTX Transceiver
    • Power Supply
      • 12 V power supply with watchdog
    • Others:
      • Dimensions: 6 x 6 cm
      • Rugged for shock and high vibration
      • On-board high-efficiency DC-DC converters
      • System management and power sequencing
      • eFUSE bit-stream encryption
      • AES bit-stream encryption
    • Temperature compensated RTC (real-time clock)
    • Three user LEDs
      • Evenly-spread supply pins for good signal integrity

    Depending on the customer design, additional cooling might be required.


    Block Diagram

    Scroll Title
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    titleTE0728 block diagram


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    Main Components

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    Notes :

    • |Picture of the PCB (top and bottom side) with labels of important components
    • Add List below

    ...

    Scroll Title
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    titleTE0728 main components


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    1. DDR3 SDRAM, U1
    2. Xilinx Automotive XA7Z020-1CLG484Q ,U2
    3. 100 MBit Ethernet transceiver, U3
    4. 100 MBit Ethernet transceiver, U10
    5. User LED Green, D4
    6. Real Time Clock, U7
    7. Standard Clock Oscillators, U5
    8. 64 Kbit I2C EEPROM, U11
    9. CAN Tranceiver, U16
    10. QSPI NOR Flash memory, U13
    11. Standard Clock Oscillators, U14
    12. Low-Quiescent-Current Programmable Delay Supervisory Circuit, U15
    13. Low-Quiescent-Current Programmable Delay Supervisory Circuit, U12
    14. B2B connector , JM2
    15. B2B connector , JM3
    16. B2B connector , JM1

    FPGA (U2), DDR3 SDRAM (U1) and QSPI (U13) can be  varied on other assembly option, for more information contact us. 

    ...

    Scroll Title
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    titleInitial delivery state of programmable devices on the module

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    Storage Device

    Symbol

    Content

    Quad SPI Flash

    U13

    Not Programmed

    EEPROMU11Not Programmed


    ...

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    • Overview of Boot Mode, Reset, Enables,

    Boot Mode


    Scroll Title
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    titleBoot process.

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    Signal

    FPGA BankPinB2BSignal StateBoot Mode

    Boot_R

    500

    E4

    J2-11

    Low

    QSPI

    HighSD Card



    Scroll Title
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    titleReset process.

    Zynq-7020SoC  includes a reset that is driven by the reset system. Hardware resets are driven by the power-on reset signal (Reset) connected to carrier and the system reset signal (PS_SRST_B)  connected to VMIO, it means after power on the PS will be reset.

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    Signal

    Scroll Title
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    Signal

    B2BI/ONote

    Reset

    J2-7InputComes from Carrier
    RST_OUTJ2-9OutputPS_PROB_B


...

Board to Board (B2B) I/Os

TE0728 Module has 3 B2B connectors and every connector has 80 pins (2 row, 40 pins).

FPGA bank number and number of I/O signals connected to the B2B connector:

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titleGeneral PL I/O to B2B connectors information

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FPGA BankTypeB2B ConnectorI/O Signal CountVoltage LevelNotes
13HRJ148 Single
-end
ended (24 Diff)VCCO_13variable from carrier
500MIOJ14
Single end
Singel ended3.3V
501MIOJ238
Single end
Singel endedVMIO1variable from carrier
33HRJ334 Single
end
ended (17 Diff)3.3V
35HR

J3

J2

20 Single

end

ended (10 Diff)

22 Single

end

ended (11 Diff)

3.3V


Ethernet PHY

Ethernet pins connections to Board to Board (B2B). Ethernet components ETH1 and ETH2 are connected to B2B connector J3.

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titleEthernet PHY B2B connectors.

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SchematicETH1ETH2DirectionNotes
CTREFJ3-57J3-25InMagnetics center tap voltage
TD+J3-58J3-28OutTransfer
TD-J3-56J3-26Out
RD+J3-52J3-22InRecieveReceive
RD-J3-50J3-20In
LED1J3-55J3-23OutLED Yellow on carrier, multiple usage-ACK
LED2J3-53J3-21Out
LED3J3-51J3-19OutLED Green on carrier, multiple usage-Link
POWERDOWN/INTL21R20In
RESET_NM15R16InActive low PHY Reset


...

Scroll Title
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titleCAN B2B connectors.

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MIO Pin
SchematicB2BDirectionNotes
CANH/CANLJ1-2/J1-4-Inout/Inout


JTAG Interface

JTAG access to the Xilinx XA7Z020 FPGA through B2B connector JM2.

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titleJTAG pins connection

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JTAG Signal

B2B Pin

TMSJ2-12
TDIJ2-10
TDOJ2-8
TCKJ2-6


...

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titleMIOs pins

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MIO PinConnected toB2BNotes
MIO0MIO0-RTC interrupt
MIO1...MIO6

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

-SPI Flash
MIO7LED RED-LED
MIO8/MIO9Tx/Rx-CAN Transceiver
MIO10...MIO13IO_0 ... IO_3J1GPIO
MIO14/MIO15SCL/SDA-I2C
MIO16...MIO27MIO39-J2GPIOMIO28...MIO39

Tx_clk, Txd0...Txd3, Tx_ctl

Rx_clk, Rxd0...Rxd3, Rx_ctl

J2ETH
MIO40...MIO48CLK, Cmd, Data0...Data3, wp, cdJ2SD
MIO48PS_MIO48_501J2LED Red on Carrier
MIO49PS_MIO49_501J2LED Yellow on Carrier
MIO50PS_MIO49_501J2LED Green on Carrier
MIO51PS_MIO51_501J2GPIO
MIO52/MIO53UART_Txd / UART_RxdJ2UART transfer/recieve


...

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever Transceiver PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

...

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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
QSPI FlashU13---
EEPROMU11EEPROM
RTCU7Real Time Clock
DDR3 SDRAMU1Volatile Memory
EthernetU3, U10Two 100 Mbit Ethernet PHY
CAN TransceiverU16---
User LEDD4Green LED
OscillatorsU14, U7, U5Clock Sources


Quad SPI Flash Memory

On-board QSPI flash memory is used to store initial FPGA configuration. Datasheet is provided in Texas Instruments. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency.

...

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titleQuad SPI interface MIOs and pins

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PinU13-A3
MIO PinSchematicNotes
MIO1SPI_CSU13-A1
MIO2SPI_DQ0/M0U13-A2
MIO3SPI_DQ1/M1U13-F6
MIO4SPI_DQ2/M2U13-E4
MIO5SPI_DQ3/M3
MIO6SPI_SCK/M4U13-A4


RTC 

The RTC has an I2C Bus (2-wire SerialInterface) and offers temperature compensated time. The STC-Smart Temperature Compensation is calibrated in the factory and leads to a very high time-accuracy.

RTC intruppt interrupt is connected to MIO0 connected to Bank 500 through pin G6.

Scroll Title
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titleI2C Address for RTC

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MIO PinI2C AddressDesignatorNotes
MIO14...15
0x68
0x56U7
---
Slave address


EEPROM

The Microchip Technology Inc. 24xx64 is a 64 Kbit Electrically Erasable PROM. The device is organized as a single block of 8K x 8-bit memory with a 2-wire serial interface. The 24xx64 also has a page write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 Kbits address space.

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titleI2C address for EEPROM

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MIO PinI2C AddressDesignatorNotes
MIO14...150xA00x50U11---Slave address


LEDs

Scroll Title
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titleOn-board LEDs

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DesignatorColorConnected toActive Level
D9GreenDONELow
D8REDMIO7High
D4GreenBank 33 - V18High


...

The TE0728 SoM has a volatile DDR3 SDRAM, 256Mx16bit (512MB), IC for storing user application code and data. Size of DDR3 can be varied in different assembly versions. 

Ethernet

  • Part number: NT5CB256M16CP-DIH
  • Supply voltage: 1.5V
  • Organization: 256M x 16 bits

DDR3 SDRAM can be varied on demand for other assembly options. DDR3 can have density of maximum 512MB due to available addressing. The maximum possible speed for DDR3 SDRAM is 1066 Mb/s.

Ethernet

There are two 100 MBit Extreme Temperature Ethernet provided by Texas Instrumen on the board. Datasheet There are two 100 MBit Extreme Temperature Ethernet provided by Texas Instrument on the board. Datasheet is provided at TI website. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz source sources is provided from MEMS Oscillator. There is no sharing of signals for the two PHY's.

...

Scroll Title
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titleEthernet PHY to Zynq SoC connections

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Bank
Schematic
Signal NameETH1ETH2
Pullup
Signal Description
NotesJ3
34
CTREF
ETH-
57
RST
J3-25Magnetics center tap voltageTD+J3-58J3-28on-boardTD-J3-56J3-26on-boardRD+J3-52J3-22on-boardRD-J3-50J3-20on-boardLED1J3-55J3-23on-boardLED Yellow on Carrier - ACKLED2J3-53J3-21on-boardSpeedLED3J3-51J3-19on-boardLED Green on Carrier- LinkPOWERDOWN/INTL21R20on-chipRESET_NM15R16on-chip

CAN Transceiver

Controller Area Network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is available in TI website. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps. 

...

anchorTable_OBP_CAN
titleCAN Tranciever interface MIOs
M15R16Ethernet reset, active-low.
34ETH_COLL16P20
34MDCP16T17

Ethernet management clock.

34MDIOM16T16Ethernet management data.
34ETH_TX_D0J22N22Ethernet transmit data 0. Output to Ethernet PHY.
34ETH_TX_D1M17P21Ethernet transmit data 1. Output to Ethernet PHY.
34ETH_TX_D2K21P22Ethernet transmit data 2. Output to Ethernet PHY.
34ETH_TX_D3M22R21Ethernet transmit data 3. Output to Ethernet PHY.
34ETH_TX_ENJ21M21Ethernet transmit enable.
34ETH_RX_D0L17R18Ethernet receive data 0. Input from Ethernet PHY. 
34ETH_RX_D1K18R19Ethernet receive data 1. Input from Ethernet PHY. 
34ETH_RX_D2J18T18Ethernet receive data 2. Input from Ethernet PHY. 
34ETH_RX_D3J20T19Ethernet receive data 3. Input from Ethernet PHY. 
34ETH_RX_DVN17P15Ethernet receive data valid.


CAN Transceiver

Controller Area Network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is available in TI website. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps. 

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titleCAN Tranciever interface MIOs

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BankSignal nameNotes
500D - TxDriver Input
500R - RxReciever Output


Oscillators

...

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titleOsillators

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ICDesignatorDescriptionFrequencyUsed as
U14MEMS Oscillator50 MHzPS_CLK
U5MEMS Oscillator25 MHzEthernet PHY Clock
U7RTC (internal oscillator)32.768 KHzCLKOUT of RTC is not connected


...

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titlePower Consumption

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Power Input PinTypical Current
VINTBD*


* TBD - To Be Determined

Power

...

Distribution Dependencies

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titlePower Dependencies


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Power on Sequence

The The TE07028 SoM meets the recommended criteria to power up the Xilinx Zynq properly by keeping a specific sequence of enabling the on-board DC-DC converters and regulators dedicated to the particular functional units of the Zynq chip and powering up the on-board voltages. When the U8 and U9 generates PWRGD signal, it turns on the U4 which generates PWRGD_3.3V, it turns on the U6 and it generates PWROK signal which is connected to MR. Whenever the supply voltage for U12 drops down below the threshold it resets the system. Actually it resets the system when all regulators are working.

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titlePower On Sequence


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Power Distribution Dependencies

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Voltage Monitor Circuit

The microprocessor supervisory circuits monitor system voltages asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user adjustable delay time after the SENSE voltage and MR return above their thresholds. Datasheet is available in Texas Instruments website.

Scroll Title
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titleVoltage Monitor Circuit


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Power Rails

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titleModule power rails.

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B2B NamePower Signal

B2B

JM1 Pin

B2B

JM2 Pin

B2B

JM3 Pin

DirectionNotes
VIN1,3--InputSupply voltage from carrier board.
VCCO_1339--I/OInput
VBATT-1-OutputRTC Supply voltage
3.3V19425,57OutputInternal 3.3V voltage level.
VMIO

-

2
Input3.3V from Variable and supplied by carrier

1.8V

-5-OutputInternal 1.8V voltage level.


...

Scroll Title
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titleZynq SoC bank voltages.

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2.5V or 3.3Vsupplied by from carrier.

Bank          

Schematic Name

Voltage

I/O TypeNotes
500VCCO_MIO0_5003.3VMIO501

VCCO_MIO1_501

MIO3.3V502VCCO_DDR_5021.5VDDR3
13VCCO_131.8V or 3.3VHRSupplied by the carrier board. J1
333.3V3.3VHRSupplied by carrier board. J3
343.3V3.3VHR
353.3V3.3VHR

Supplied by the carrier board. J2, J3

Board to Board Connectors

...

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MIO
501

VCCO_MIO1_501

2.5V or 3.3VMIOsupplied by carrier.
502VCCO_DDR_5021.5VDDR3
13VCCO_131.8V or 3.3VHRSupplied by the carrier board. J1
333.3V3.3VHRSupplied by carrier board. J3
343.3V3.3VHR


353.3V3.3VHR

Supplied by the carrier board. J2, J3


Board to Board Connectors

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  • This section is optional and only for modules.
  • use "include page" macro and link to the general B2B connector page of the module series, for example: 4 x 5 SoM LSHM B2B Connectors

    Include Page
    6 x 6 SoM LSHM B2B Connectors
    6 x 6 SoM LSHM B2B Connectors

Include Page
6 x 6 SoM TEM and SEM B2B Connectors
6 x 6 SoM TEM and SEM B2B Connectors

Technical Specifications

Absolute Maximum Ratings

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titleAbsolute maximum ratings

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SymbolsMinMaxUnitDescription
VIN supply voltage-0.365VTPS54260-Q1 datasheets.
VMIO-0.53.6VPS MIO I/O supply voltage
VCCO

...

6 x 6 modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

  • 3 x REF-189018-01 (compatible to SEM-140-02-03.0-H-D-A), (80 pins, "40" per row)

Technical Specifications

Absolute Maximum Ratings

PL supply voltage for HR I/O banksI/O input
Scroll Title
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SymbolsDescriptionMinMaxUnit
VCCPINTPS internal logic supply voltage-0.51.1V
VCCPAUXPS auxiliary supply voltage-0.52.0V
VCCPLLPS PLL supply-0.52.0V
VCCO_DDRPS DDR I/O supply voltage-0.52.0V
VPREFPS input reference voltage-0.52.0V
VCCO_MIO0PS MIO I/O supply voltage for HR I/O banks-0.53.6V
VCCO_MIO1PS MIO I/O supply voltage for HR I/O banks1.713.45V
VCCINTPL internal logic supply voltage-0.51.1V
VCCPAUXPL auxiliary supply voltage-0.52.0V
VCCPLLPL PLL supply-0.51.1V
VPREFPL input reference voltage-0.52.0V
VCCO
-0.53.6V
VIN
PL supply voltage for HR I/O banks
1.713.45V
Storage Temperature-40+85°C