Page History
...
Figure 6: Connections between the on-board DC-DC and LDO regulators.
| Page break |
|---|
Power Rails
Voltages on B2B-Connectors | JM1 Pin | JM2 Pin | Direction | Note |
|---|---|---|---|---|
| VIN | 1, 3, 5 | 2, 4, 6, 8 | Input | Supply voltage. |
| 3.3VIN | 13, 15 | - | Input | Supply voltage. |
| VCCIO12 | - | 7, 9 | Input | High range bank voltage. |
| VCCIO13 | 9, 11 | - | Input | High range bank voltage. |
| VCCIO15 | - | 5 | Input | High range bank voltage. |
| VCCIO16 | - | 1, 3 | Input | High range bank voltage. |
| 3.3V | - | 10, 12, 91 | Output | Internal 3.3V voltage level. |
...
Recommended Operating Conditions
| Parameter | Min | Max | Units | Notes | Reference Document |
|---|---|---|---|---|---|
| VIN supply voltage | 2.4 | 5.5 | V | - | EP53F8QI data sheet |
| 3.3VIN supply voltage | 3.135 | 3.465 | V | 3,3V ± 5% | - |
| PL I/O bank supply voltage for HR I/O banks (VCCO) | 1.14 | 3.465 | V | - | Xilinx datasheet DS182 |
| I/O input voltage for HR I/O Banks | -0.20 | VCCO+0.2 | V | - | Xilinx datasheet DS182 |
| GT receiver (RXP/RXN) and transmitter (TXP/TXN) | (*) | (*) | - | - | * |
| See datasheet DS182 | |||||
| Voltage on Module JTAG pins | 3.135 | 3.465 | V | - | - |
Table 13: Recommended operation conditions.
...
Overview
Content Tools