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  1. HDMI Connector (1.4 HEAC Support)
  2. Micro USB Connector (Device, Host or OTG Modes)
  3. Pmod Connector for Zynq-module PL (4 LVDS-pairs, max. VCCIO-voltage: VIOTA)

  4. Pmod Connector for Zynq-module PL (4 LVDS-pairs, max. VCCIO-voltage: FMC_VADJ)
  5. User Push Button S2 ("RESTART" button by default)
  6. User Push Button S1 ("RESET" button by default)
  7. User LEDs (function mapping depends on firmware of System-Controller-CPLD)
  8. Mini USB Connector (USB JTAG and UART Interface)
  9. User 4-bit DIP Switch
  10. VITA 57.1 compliant FMC LPC Connector with digitally programmable FMC VADJ Power Supply
  11. Barrel jack for 12V Power Supply
  12. ARM JTAG Connector (DS-5 D-Stream) - PJTAG to EMIO multiplexing needed
  13. User 4-bit DIP Switch (provides the possibility functionality to set voltage FMC_VADJ)
  14. Pmod Connector (J1, max. VCCIO-voltage: 3.3V): mapped to 8 Zynq PS MIO0-bank-pins (MIO0, MIO9 to MIO15) when using TE0720 (same mapping as on Zedboard), 6 pins (MIO10 to MIO15) are additionally connected to TE0701 System-Controller-CPLD
  15. RJ45 GbE Connector
  16. SD Card Connector - Zynq SDIO0 Bootable SD port
  17. Pmod Connector (J2, max. VCCIO-voltage: 3.3V): 6 pins (PX0 to PX5) can be multiplexed by Texas Instruments TXS02612RTWR SDIO Port Expander to MIO-pins of Zynq-module, 2 pins are connected to TE0701 System-Controller-CPLD (PX6 and PX7)
  18. Jumper J18
  19. Mini CameraLink Connector
  20. Battery holder for CR1220 (RTC backup voltage)
  21. Trenz 4x5 module Socket (3x Samtec LSHM Series Connectors)
  22. Jumper J16, J17, J21
  23. Jumper J9, J19, J20

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  • Overvoltage-, undervoltage- and reversed- supply-voltage-protection
  • Barrel jack for 12V power supply
  • Carrier Board System-Controller-CPLD Lattice MachXO2 1200HC, programable by Mini-USB JTAG-Interface J7
  • Zynq-module programable by ARM-JTAG-Interface-Connector (J15) or by System-Controller-CPLD via Mini-USB JTAG-Interface J7 or JTAG-Interface on FMC-Connector J10
  • Mini CameraLink
  • RJ45 Gigabit Ethernet Jack MagJack with 2 integrated LEDs.
  • FPGA Mezzanine Card (FMC) Connector J10 for acces to Zynq-Module's LVDS-pairs, operable with adjustable IO-voltage FMC_VADJ
  • USB JTAG- and UART-Interface (FTDI FT2232HQ) with Mini-USB-Connector J7
  • ADV7511 HDMI Transmitter with HDMI-Connector J4
  • 8 x user LEDs routed to System-Controller-CPLD, 8 x red
  • 2 x user-push button routed to System-Controller-CPLD; by default configured as system "RESET" and "RESTART" button (depends on CPLD-Firmware)
  • 2 x 4-bit DIP-Switch for base-board-configuration (3 switches routed to System-Controller-CPLD, 3 switches to set voltage FMC_VADJ, 1 switch routed to Zynq-module (MIO0), 1 switch enables Mini-USB JTAG-Interface J7)
  • PMOD-Connectors to access Zynq-Module's LVDS-pairs and MIO-Pins
  • Micro SD card socket, can be used to boot system
  • Micro-USB-Interface (J12) connected to Zynq-module (Device, Host or OTG modes)
  • Trenz 4x5 module Socket (3 x Samtec LSHM series connectors)

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Micro SD Card socket is not directly wired to the B2B connector pins, but through a Texas Instruments TXS02612 SDIO Port Expander, which is needed for voltage translation due to different voltage levels of the Micro SD Card and MIO-bank of the Xilinx Zynq-module. The Micro SD Card has 3.3V signal voltage level, but the MIO-bank on the Xilinx Zynq-module has VCCIO 1.8V.

The MIO-bank-pins, of the Zynq-module is , which are dedicated to SDIO-interface, are also accessible by PMOD-Connector J2, which is configurable by the "SEL_SD"-signal of the System-Controller-CPLD. The connector J2 has max. VCCIO 3.3V.

Dual channel USB to UART/FIFO

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The JTAG port of the CPLD is enabled by setting switch S3 labeled as "ENJTAG" to the OFF-position.

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LEDs

There are eight LED's LEDs (L1 to L8) available to the user. All LEDs are red colored and connected to the on-board System-Controller-CPLD. Their functions are programmable and depend on the firmware of the System-Controller-CPLD. For detailed information, please refer to the documentation of the TE0701 Sytem-Controller-CPLD.

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S3-1CM1: Mode pin 1 (routed to Carrier Controller)
S3-2CM0: Mode pin 0 (routed to Carrier Controller)
S3-3JTAGEN: Set to ON for normal JTAG operation. Must be moved to OFF position for TE0701 CPLD update only
S3-4 MIO0: Readable signal by Carrier System-Controller-CPLD and mounted TE07xx Module

User-Push-Buttons

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TE0701 has a RJ45 Gigabit Ethernet MAGJACK MagJack (J14) with two LEDs.

On-board Ethernet jack MagJack J14 pins are routed to B2B connector JB1 via MDI. The center tap of the Magnetics is not connected to module's B2B connector.

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