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- HDMI Connector (1.4 HEAC Support)
- Micro USB Connector (Device, Host or OTG Modes)
Pmod Connector for to access Zynq-module's PL IO-bank pins (4 LVDS-pairs, max. VCCIO-voltage: VIOTA)
- Pmod Connector to access for Zynq-module's PL IO-bank pins (4 LVDS-pairs, max. VCCIO-voltage: FMC_VADJ)
- User Push Button S2 ("RESTART" button by default)
- User Push Button S1 ("RESET" button by default)
- User LEDs (function mapping depends on firmware of System-Controller-CPLD)
- Mini USB Connector (USB JTAG and UART Interface)
- User 4-bit DIP Switch
- VITA 57.1 compliant FMC LPC Connector with digitally programmable FMC VADJ Power Supply
- Barrel jack for 12V Power Supply
- ARM JTAG Connector (DS-5 D-Stream) - PJTAG to EMIO multiplexing needed
- User 4-bit DIP Switch (provides the functionality to set voltage FMC_VADJ)
- Pmod Connector (J1, max. VCCIO-voltage: 3.3V): mapped to 8 Zynq PS MIO0-bank-pins (MIO0, MIO9 to MIO15), 6 pins (MIO10 to MIO15) are additionally connected to TE0701 System-Controller-CPLD
- RJ45 GbE Connector
- SD Card Connector - Zynq SDIO0 Bootable SD port
- Pmod Connector (J2, max. VCCIO-voltage: 3.3V): 6 pins (PX0 to PX5) can be multiplexed by Texas Instruments TXS02612RTWR SDIO Port Expander to MIO-pins of Zynq-module, 2 pins are connected to TE0701 System-Controller-CPLD (PX6 and PX7)
- Jumper J18
- Mini CameraLink Connector
- Battery holder for CR1220 (RTC backup voltage)
- Trenz 4x5 module Socket (3x Samtec LSHM Series Connectors)
- Jumper J16, J17, J21
- Jumper J9, J19, J20
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Dual channel USB to UART/FIFO
The TE0701 Carrier Board has on-board USB 2.0 High Speed to UART/FIFO IC FT2232HQ from FTDI. Channel A can be used as JTAG-Interface (MPSSE) to program the System-Controller-CPLD, Channel B can be used as UART-Interface routed to CPLD. There also 4 additionally bus-lanes available for user-specific use. The FT2232HQ-Chip can also be used as FIFO in FT245 asynchronous mode.
There is also a standard 256 Byte EEPROM connected to the FT2232HQ-chip available to store custom configuration settings. EEPROM settings can be changed using FTDI provided tools that can be downloaded from FTDI website. See FTDI website for more information.
USB Interface
The TE0701 board Carrier Board has two physical USB-connectors:
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JTAG access to the CPLD and Xilinx Zynq-module is provided via Mini-USB JTAG Interface J7 (FTDI FT2232H) and controlled by DIP switch S3-3.
The JTAG port of the CPLD is enabled by setting switch S3-3 labeled as "ENJTAG" to the OFF-position.
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| S3-1 | CM1: Mode pin 1 (routed to Carrier Controller) |
| S3-2 | CM0: Mode pin 0 (routed to Carrier Controller) |
| S3-3 | JTAGEN: Set to ON for normal JTAG operation. Must be moved to OFF position for TE0701 System-Controller-CPLD update only |
| S3-4 | MIO0: Readable signal by System-Controller-CPLD and mounted TE07xx Module |
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| Name | Default Mapping: | ||
|---|---|---|---|
| S1 | If S1 is pushed, the active-low RESet IN (RESIN) signal will be asserted. Note: This reset can also be forced by the FTDI USB-to-JTAG interface. | ||
| S2 | If S2 is pushed, the active-high Power ON (PON) signal (that is internally pulled-up) will be deasserted, which can be considered as a "RESTART" button to switch off (push button) and on (release button) all on-module power supplies (except 3.3VIN). Note: The capability the switch to be enabled the first time will become active shortly after Power on Reset (POR).
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The functionality of the push buttons depends on the CPLD-firmware. For detailed information of the function of the push buttons, please refer to the documentation of the TE0701 Sytem-Controller-CPLD.
Ethernet
The TE0701 Carrier Board has a RJ45 Gigabit Ethernet MagJack (J14) with two LEDs.
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TE0701 jumper and DIP switch overview
On the TE0701 carrier boards board different VCCIO configurations can be chosen by 7 jumpers and one dedicated 4-bit DIP-switch S4.
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Overview
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