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Figure 2: TE0711 (REV 01).

1. Xilinx Artix-7 (15T to 100T) FPGA
2. EN6347QI voltage Regulator regulator 1.0V
3. EN5311QI voltage Regulator regulator 1.8V
4. S25FL256S 32 MByte Quad SPI Flash memory
5. Dual USB to UART/FIFO Bridge (FT2232H)
6. TPS27082L load switch for 3.3V voltage level
7. B2B connector  JM1 (0,40 mm Samtec Razor Beam™ High Speed Hermaphroditic Terminal/Socket Strip (LSHM-150)), JM1
8. B2B connector  JM2 (0,40 mm Samtec Razor Beam™ High Speed Hermaphroditic Terminal/Socket Strip (LSHM-150)), JM2
9. B2B connector  JM3 (0,40 mm Samtec Razor Beam™ High Speed Hermaphroditic Terminal/Socket Strip (LSHM-150))System Controller CPLD (Lattice LCMXO2-256HC): 256 Macrocell 130, JM3
10.  System Controller CPLD
11. SiT8008AI 100 MHz reference clock (connected to FPGA bank 14)
12. SiT8008AI 12 MHz reference clock (connected to USB to UART/FIFO Bridge)
13. EEPROM (configuration data for USB to UART/FIFO Bridge)
    
14. TPS3805H33 voltage detector for generating "Power OK"-signal indicating successful power-on-sequencing

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B2B connector Samtec Razor Beam™ LSHM-150, JM1