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Refer to https://shopwiki.trenz-electronic.de/ee/Download/?path=Trenz_Electronicdisplay/PD/TE0841+TRM for downloadableonline version of this manual and additional technical documentation of the product. |
The Trenz Electronic TE0841-01 is an industrial-grade 4 x 5 cm SoM integrating Xilinx Kintex UltraScale KU035 FPGA, 2 banks of 512 MByte DDR4 SDRAM, 32 MByte QSPI Flash for configuration and operation, and powerful switch-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips. All this on a tiny footprint, smaller than a credit card size at very competitive price. All Trenz Electronic 4 x 5 cm SoMs are mechanically compatible.
Key Features
- Xilinx Kintex UltraScale FPGA (XCKU035 or XCKU040)
- 2 banks of 512 MByte, 16 bit wide DDR4 SDRAM
- 256 Mbit (32 MByte) QSPI Flash
- 3 x Samtec Razor Beam LSHM B2B, 260 terminals total
- User I/O: 60 x HR, 84 x HP
- Serial transceiver: 8 x GTH lanes (TX/RX)
- GT clock inputs: 2 - Clocking
- Si5338 - 4 output PLLs, GT and PL clocks
- 200 MHz LVDS oscillator - All power supplies on-board, single power source operation
- Evenly spread supply pins for optimized signal integrity
- Size: 40 x 50 mm
- 3 mm mounting holes for skyline heat spreader
- Rugged for industrial applications
Additional assembly options for cost or performance optimization plus high volume prices are available on request.
Block Diagram
Main Components
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- Xilinx Kintex UltraScale FPGA, U1
- Ultra Performance Oscillator performance oscillator @25.000000 MHz, U3
- 12A PowerSoC DC-DC Converter converter (0.95V), U14
- 12A PowerSoC DC-DC Converter converter (0.95V), U7
- Low-jitter Precision precision LVDS Oscillator oscillator @200.0000 MHz, U11
- Low-dropout (LDO) linear regulator (MGTAVTT 1.20V), U8
- Low-dropout (LDO) linear regulator (MGTAVCC 1.02V), U12
- Samtec Razor Beam™ LSHM-150 B2B connector, JM1
- Samtec Razor Beam™ LSHM-150 B2B connector, JM2
- Samtec Razor Beam™ LSHM-130 B2B connector, JM3
- Programmable quad clock generator, U2
- 32 MByte QSPI Flash, U6
- 4 Gbit DDR4 SDRAM, U4
- 4 Gbit DDR4 SDRAM, U5
- System Controller CPLD, U18
- Low-dropout (LDO) linear regulator (MGTAUX), U9
- Ultra-low power low-dropout (LDO) regulator (VBATT), U19
Key Features
- Xilinx Kintex UltraScale XCKU035 FPGA
- Rugged for industrial applications
- 2 banks of 512 MByte, 16 bit wide DDR4 SDRAM
- 256 Mbit (32 MByte) QSPI Flash
- Size: 40 x 50 mm
- 3 mm mounting holes for skyline heat spreader
- B2B Connectors: 3 x Samtec Razor Beam LSHM, 260 terminals total
- User I/O: 12 x HR, 132 x HP
- Serial transceiver: 8 x GTH lanes (TX/RX)
- GT clock inputs: 2 - Clocking
- Si5338 - 4 output PLLs, GT and PL clocks
- 200 MHz LVDS oscillator - All power supplies on-board, single power source operation
- Evenly spread supply pins for optimized signal integrity
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Initial Delivery State
Storage device name | Content | Notes |
---|---|---|
OTP Flash area | Empty |
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FPGA Bank | Type | B2B Connector | I/O Signal Count | Voltage | Notes |
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64 | HR | JM1 | 48 IOs, 24 LVDS pairs | B64_VCCO | Supplied by the baseboardcarrier board. |
65 | HR | JM1 | 8 IOs | 3.3V | |
224 | MGT | JM1 | 3 lanes | ||
65 | HR | JM3 | 4 IOs, 2 LVDS pairs | 3.3V | |
66 | HP | JM3 | 16 IOs, 8 LVDS pairs | B66_VCCO | Supplied by the baseboardcarrier board |
224 | MGT | JM3 | 1 lane | ||
225 | MGT | JM3 | 4 lanes | ||
67 | HP | JM2 | 48 IOs, 24 LVDS pairs | B67_VCCO | Supplied by the baseboardcarrier board |
67 | HP | JM2 | 2 IOs | B67_VCCO | Supplied by the baseboardcarrier board |
68 | HP | JM2 | 18 IOs, 9 LVDS pairs | B68_VCCO | Supplied by the baseboardcarrier board |
For detailed information about the pin out, please refer to the Pin-out Tables.
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Clock Signal | Frequency | Source | FPGA | Notes |
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- | 25.000000 MHz | SiT8208 (U3), CLK | - | Reference clock input for Si5338 PLL quad clock generator. |
CLK200M | 200.0000 MHz | DSC1123 (U11), OUT | R25/R26, bank 45 | |
CLK0 | User programmable | Si5338 (U2), CLK3 | T24/T25, bank 45 | |
CLK1 | User programmable | Si5338 (U2), CLK0 | R23/P23, bank 45 | |
MGT_CLK0Baseboard supplied | Supplied by the carrier board | JM3-31, JM3-33 | Y5/Y6, bank 225 | Bank 225 MGTs clock source from baseboard. |
MGT_CLK1 | User programmable | Si5338 (U2), CLK1 | V5/V6, bank 225 | Bank 225 MGTs clock source from on-board PLL quad clock generator. |
MGT_CLK2Baseboard supplied | Supplied by the carrier board | JM3-32, JM3-34 | AD6/AD5, bank 224 | Bank 224 MGTs clock source from baseboard. |
MGT_CLK3 | User programmable | Si5338 (U2), CLK2 | AB6/AB5, bank 224 | Bank 224 MGTs clock source from on-board PLL quad clock generator. |
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Power Consumption
Power Input Pin | Max Typical Current |
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VIN | TBD* |
3.3VIN | TBD* |
* TBD - To be determined soon with reference design setup.
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For highest efficiency of the on-board DC-DC regulators, it is recommended to use same 3.3V power source for both VIN and 3.3VIN power rails. Although VIN and 3.3VIN can be powered up in any order, it is recommended to power them up simultaneously.
It is important that all baseboard I/Os are 3-stated at power-on until System Controller CPLD sets PGOOD signal high (B2B connector JM1, pin 30), or 3.3V is present on B2B connector JM2 pins 10 and 12, meaning that all on-module voltages have become stable and module is properly powered up.
See also Xilinx datasheet DS892 for additional information. User should also check related baseboard documentation when choosing baseboard design for TE0720 module.
Power Rails
Voltages on B2B Connectors | B2B JM1 Pins | B2B JM2 Pins | Input/Output | Notes |
---|---|---|---|---|
VIN | 1, 3, 5 | 2, 4, 6, 8 | Input | Supply voltage. |
3.3VIN | 13, 15 | - | Input | Supply voltage. |
B64_VCO | 9, 11 | - | Input | HR (High Range) bank voltage. |
B66_VCO | - | 1, 3 | Input | HP (High Performance) bank voltage. |
B67_VCO | - | 7, 9 | Input | HP (High Performance) bank voltage. |
B68_VCO | - | 5 | Input | HP (High Performance) bank voltage. |
VBAT_IN | 79 | - | Input | RTC battery supply voltage. |
3.3V | - | 10, 12, 91 | Output | Module on-board 3.3V voltage level. |
Board to Board Connectors
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Variants Currently In Production
Module Variant | FPGA Chip |
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Temperature Range | |
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TE0841-01-035-1C | XCKU035-1SFVA784C |
Commercial | |
TE0841-01-035-1I | XCKU035-1SFVA784I |
Industrial | |
TE0841-01-035-2I | XCKU035-2SFVA784I |
Industrial | ||
TE0841-01-040-1C | XCKU040-1SFVA784C | Commercial |
TE0841-01-040-1I | XCKU040-1SFVA784I | Industrial |
Technical Specifications
Absolute Maximum Ratings
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
VIN supply voltage | V | - | ||
Supply voltage for HR I/O banks (VCCO) | –0.500 | 3.400 | V | See Xilinx datasheet DS892. |
Supply voltage for HP I/O banks (VCCO) | –0.500 | 2.000 | V | See Xilinx datasheet DS892. |
I/O input voltage for HR I/O banks | –0.400 | VCCO + 0.550 | V | See Xilinx datasheet DS892. |
I/O input voltage for HP I/O banks | –0.550 | VCCO + 0.550 | V | See Xilinx datasheet DS892. |
GTH and GTY transceivers receiver (RXP/RXN) and transmitter (TXP/TXN) absolute input voltage | -0.500 | 1.260 | V | See Xilinx datasheet DS892. |
Storage temperature | -40 | +85 | °C | - |
Recommended Operating Conditions
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
VIN supply voltage | ||||
Supply voltage for HR I/O banks (VCCO) | 1.140 | 3.400 | V | See Xilinx datasheet DS892. |
Supply voltage for HP I/O banks (VCCO) | 0.950 | 1.890 | V | See Xilinx datasheet DS892. |
I/O input voltage | –0.200 | VCCO + 0.20 | V | See Xilinx datasheet DS892. |
Note |
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Assembly variants for higher storage temperature range are available on request. |
Operating Temperature Ranges
Commercial grade: 0°C to +70°C.
Industrial grade: -40°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Physical Dimensions
Module size: 50 mm × 40 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 8 mm.
PCB thickness: 1.6 mm.
Highest part on PCB: approximately 3 mm. Please download the step model for exact numbers.
All dimensions are given in millimeters.
Operating Temperature Ranges
Commercial grade: 0°C to +70°C.
Industrial grade: -40°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Weight
47 g - Plain module.
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Hardware Revision History
Date | Revision | Notes | PCN | Documentation Link |
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2015-12-09 | 01 | First production revision | - | TE0841-01 |
Hardware revision number is printed on the PCB board together with the module model number separated by the dash.
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Date | Revision | Contributors | Description |
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2017-0106-3112 | Jan Kumann | Initial document. |
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