Page History

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Storage device name	Content	Notes
OTP Flash area	Empty	Not programmed.

Signals, Interfaces and Pins

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FPGA Bank	Type	B2B Connector	I/O Signal Count	Voltage	Notes
64	HR	JM1	48 IOs, 24 LVDS pairs	B64_VCCO	Supplied B64_VCCO supplied by the carrier board.
65	HR	JM1	8 IOs	3.3V
224	MGT	JM1	3 lanes
65	HR	JM3	4 IOs, 2 LVDS pairs	3.3V
66	HP	JM3	16 IOs, 8 LVDS pairs	B66_VCCO	Supplied B66_VCCO supplied by the carrier board
224	MGT	JM3	1 lane
225	MGT	JM3	4 lanes
67	HP	JM2	48 IOs, 24 LVDS pairs	B67_VCCO	Supplied B67_VCCO supplied by the carrier board
67	HP	JM2	2 IOs	B67_VCCO	Supplied B67_VCCO supplied by the carrier board
68	HP	JM2	18 IOs, 9 LVDS pairs	B68_VCCO	Supplied B68_VCCO supplied by the carrier board

For detailed information about the pin out, please refer to the Pin-out Tables.

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