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On-board QSPI flash memory (U6) on the TE0841-01 is provided by Micron Serial NOR Flash Memory N25Q256A with 256-Mbit (32-MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
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Programmable PLL Clock
Module has Silicon Labs I2C programmable quad PLL clock generator on-board (Si5338A, U2) to generate .
Si5338A Pin | Signal Name / Description | Connected To | Direction | Note |
---|---|---|---|---|
IN1 | - | Not connected. | Input | - |
IN2 | - | GND | Input | - |
IN3 | Reference input clock. | U3, pin 3 | Input | 25.000000 MHz oscillator, Si8208AI. |
IN4 | - | GND | Input | LSB (pin 'IN4') of the default I2C address 0x70 not activated. |
IN5 | - | Not connected. | Input | - |
IN6 | - | GND | Input | - |
CLK0A | CLK1_P | U1, R23 | Output | FPGA bank 45. |
CLK0B | CLK1_N | U1, P23 | Output | FPGA bank 45. |
CLK1A | MGTCLK1_N | Output | ||
CLK1B | MGTCLK1_P | Output | ||
CLK2A | MGTCLK3_N | Output | ||
CLK2B | MGTCLK3_P | Output | ||
CLK3A | CLK0_P | U1, pin T24 | Output | FPGA bank 45. |
CLK3B | CLK0_N | U1, pin T25 | Output | FPGA bank 45. |
Clock Signal | Frequency | Source | FPGA | Notes |
---|---|---|---|---|
- | 25.000000 MHz | SiT8208 (U3), CLK | - | Reference clock input for Si5338 PLL quad clock generator. |
CLK200M | 200.0000 MHz | DSC1123 (U11), OUT | R25/R26, bank 45 | |
CLK0 | User programmable | Si5338 (U2), CLK3 | T24/T25, bank 45 | |
CLK1 | User programmable | Si5338 (U2), CLK0 | R23/P23, bank 45 | |
MGT_CLK0 | Supplied by the carrier board | JM3-31, JM3-33 | Y5/Y6, bank 225 | Bank 225 MGTs clock source from baseboard. |
MGT_CLK1 | User programmable | Si5338 (U2), CLK1 | V5/V6, bank 225 | Bank 225 MGTs clock source from on-board PLL quad clock generator. |
MGT_CLK2 | Supplied by the carrier board | JM3-32, JM3-34 | AD6/AD5, bank 224 | Bank 224 MGTs clock source from baseboard. |
MGT_CLK3 | User programmable | Si5338 (U2), CLK2 | AB6/AB5, bank 224 | Bank 224 MGTs clock source from on-board PLL quad clock generator. |
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