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Signal Schematic NameFPGA DirectionDescriptionLogic
WAKEInputLink reactivationLow active
PERSTOutputInputPCI Express reset inputLow active
PRSNT1InputReference pin for PCIe card lane size-
PRSNT2InputPCI Express ×1 cardsconnect to PRSNT1
PRSNT3InputPCI Express ×4 cardsconnect to PRSNT1
PRSNT4InputPCI Express ×8 cardsconnect to PRSNT1
PRSNT5InputPCI Express ×16 cardsconnect to PRSNT1
PCIE_I²CBiDir2-wire PCIE System Management Bus-

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