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Block Diagram
Functional description
A 3-phase permanent-magnet synchronous motor with
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attached encoder and mechanical load is
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mounted to
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a EDPS Driver
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Board TEC0053 by using an Adapter Board TEC0060. The Driver Board is connected to a Control Board ARTY-Z7 through PMOD connectors. A Host PC running a Web Browser connects to the Control Board through a Network.
On the Driver Board, the 3-phase power stage
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drives the motor according to the PWM signal. The current transducers on the Driver Board transform the phase currents on 2 (optionally 3) phases into voltages, which, along with the DC Link voltage, are converted by ADC-s into a delta-sigma bitstream. The encoder signals and the sigma-delta bitstream are passed through the galvanic isolation to the Control Board. The PWM signal and ADC clock from the Control Board are passed through the galvanic isolation as well.
On the Control Board, the FPGA configuration is determined with the SDSoC Application built on top of the SDSoC Hardware Platform and the ARM Cortex-A9 CPU is running the Embedded Linux Code.
The SDSoC Hardware Platform provides a stream-oriented interface of the underlying hardware to the FOC algorithm. The streams are as follows:
- The data stream to the FOC algorithm consists of the concatenated stream of rotor angle and motor speeds and the stream of discrete ADC samples.
- The stream of PWM duty cycles from the FOC algorithm, which are converted to the PWM signals for the power stage.
- The stream of monitor data from the FOC algorithm, which is captured and written to the DMA buffer in the main memory. This monitor data stream can consist either of phase current data, stator current data or stator voltage data.
The SDSoC Application provides the FOC algorithm. The FOC algorithm operates on the AXI4 Stream to and from the SDSoC Hardware Platform and provides a set of AXI registers to control and monitor teh status of the FOC algorithm. The control registers determine the FOC algorithm operating parameters and the source of the monitor data stream.
The Embedded Linux Code, running on the ARM Cortex-A9 CPU consists of the following:
- The Linux OS manages the hardware and provides execution environment for the programs to run in, which includes a TCP/IP network stack. The drivers included provide access to the control and status registers of the FOC algorithm and to the DMA buffer of the monitor data stream.
- The Network API is a server program, which provides an API built on top of Websockets protocol to control and monitor the FOC algorithm and to capture the monitor data stream.
- The Web Server, which is used to host the Web UI.
The Web UI running in a web browser on the Host PC enables one to operate the EDDP Kit from anywhere in a network
A TEC0060 board, included in the EDDP Kit, is used as a mechanical and electrical adaptor for the reference motor.
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List of the documents for further information:
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Overview
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