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Introduction
Electronic Drive Development Platform (EDDP) provides all necessary software and hardware components for development and evaluation of motor control applications. While those components (both software and hardware) can also be used separatly this manual describes EDDP usage with default reference hardware platform (EDDP Kit) only.
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- All items listed under Requirements for Functional Test.
- Basic knowledge of Xilinx All Programmable FPGA and/or SoC devices, basic knowledge of Xilinx SDK and C/C++ programming in order to be able to adapt the firmware to your requirements.
- A PC capable of running Xilinx Vivado 2017.1
Installation
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Micro-SD is delivered without Linux images to avoid any issues related to US export control regulations. |
Hardware Assembly
When delivered as full EDDP Kit several components are pre-assembled.
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The Motor is pre-mounted to the Driver board using the Adapter Board and accessories. |
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Control Board
The default Control Board is the Digilent ARTY-Z 7010, which is delivered as part of the EDDP Kit. This manual contains information relevent to the actual use of the ARTY-Z as a Control Board within the EDDP only; all technical data and user guides and manuals for the Controller Board are provided by the controller board manufacturer (Digilent Inc.). Use of the other Control boards with the EDPS Driver board is also outside the scope of this manual. Primary support for other control boards is currently provided by QDESYS.
Software
The software delivered on the SD card configures the FPGA on the ARTY-Z board with the Field-Oriented Control algorithm and starts the web server to serve the Web User Interface (Web UI).
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The radio buttons "Forward" and "Reverse" can be used to change the direction; the target slider will be changed accordingly.
Motor/Encoder
The default motor is supplied in the EDDP Kit; see the chapter Reference Motor for details. Use of custom motors is outside the scope of this manual.
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| Title | Description |
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| FOC SDSoC | Implementation of a Field-Oriented Control algorithm in C++ with Vivado SDSoC |
| SDSoC Hardware Platform ARTY-Z7 | A basis for building Vivado SDSoC applications running on an Arty-Z7 board connected to a TEC0053 board |
| AXI4-Stream AD7403 | An IP core for filtering the delta-sigma bitstream read from one or more ADC-s of type of AD7403 to an AXI4-Stream of samples |
| AXI4-Stream Encoder | An IP core for converting impulses from a relative index encoder with an index signal to an AXI4-Stream of position and speed data |
| AXI4-Stream PWM | An IP core for generating PWM signals according to the input AXI4-Stream |
| AXI4-Stream Concat | An IP core for concatenating AXI4-Streams |
| Web GUI | A Web UI to control and monitor an EDPS board over the Network API |
| Network API | A communication protocol, based on Websockets, to control an EDPS board |
| Embedded Linux Code | A server program interfacing to an EDPS board and implementing the Network API and the functions of a Web Server |
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References
All resource links for other relevant documents and websites are available from Trenz EDDP Web Hub:
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Overview
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