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| Scroll Title |
|---|
| anchor | Table_DRH |
|---|
| title | Design Revision History |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Date | Vivado | Project Built | Authors | Description |
|---|
| 2019-08-09 | 2018.3 | TE0808-test_board_noprebuilt-vivado_2018.3-build_07_20190809131546.zip
TE0808-test_board-vivado_2018.3-build_07_20190809131522.zip | John Hartfie | | | 2019-05-06 | 2018.3 | TE0808-test_board_noprebuilt-vivado_2018.3-build_05_20190507124141.zip
TE0808-test_board-vivado_2018.3-build_05_20190507124130.zip | John Hartfiel | | | 2018-07-11 | 2018.2 | TE0808-test_board_noprebuilt-vivado_2018.2-build_02_20180711143743.zip
TE0808-test_board-vivado_2018.2-build_02_20180711143702.zip | John Hartfiel | - additional notes for FSBL generated with Win SDK
- changed *.bif
| | 2018-03-29 | 2017.4 | TE0808-test_board-vivado_2017.4-build_07_20180329151341.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_07_20180329151355.zip | John Hartfiel | | | 2018-01-16 | 2017.4 | TE0808-test_board-vivado_2017.4-build_04_20180116144644.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_04_20180116144657.zip | John Hartfiel | - Update Board Part for TEBF0808
- no changes for test board design and minimal board parts
| | 2018-01-15 | 2017.4 | TE0808-test_board-vivado_2017.4-build_03_20180115084954.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_03_20180115085020.zip | John Hartfiel | | | 2017-12-20 | 2017.2 | TE0808-test_board-vivado_2017.2-build_07_20171220192501.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_07_20171220192448.zip | John Hartfiel | | | 2017-11-22 | 2017.2 | TE0808-test_board-vivado_2017.2-build_05_20171122080211.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171122080228.zip | John Hartfiel | - Update Board Part CSV File
- Regenerate design
| | 2017-11-16 | 2017.2 | TE0808-test_board-vivado_2017.2-build_05_20171116151545.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171116151600.zip | John Hartfiel | - Update Board Part CSV File with new Flash assembly variants
| | 2017-11-13 | 2017.2 | TE0808-test_board-vivado_2017.2-build_05_20171113140954.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171113141908.zip | John Hartfiel | |
|
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| Scroll Title |
|---|
| anchor | Table_HWM |
|---|
| title | Hardware Modules |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
|---|
TE0808-ES1 | es1_2gb | REV03|REV02 | 2GB | 64MB | NA | NA | Not longer supported by vivado | | TE0808-ES2 | es2_2gb | REV04|REV03 | 2GB | 64MB | NA | NA | Slower DDR Speed | | TE0808-2ES2 | 2es2_2gb | REV04|REV03 | 2GB | 64MB | NA | NA | Slower DDR Speed | | TE0808-04-09EG-1EA | 9eg_1e_2gb | REV04 | 2GB | 64MB | NA | NA | NA |
| | TE0808-04-09EG-1EB | 9eg_1e_4gb | REV04 | 4GB | 64MB | NA | NA | NA |
| | TE0808-04-09EG-1ED | 9eg_1e_4gb | REV04 | 4GB | 64MB | NA | 1 mm connectorsNA |
| | TE0808-04-09EG-2IB | 9eg_2i_4gb | REV04 | 4GB | 64MB | NA | NA NA |
| | TE0808-04-15EG-1EB | 15eg_1e_4gb | REV04 | 4GB | 64MB | NA | NA | NA |
| | TE0808-04-09EG-1EE | 9eg_1e_4gb | REV04 | 4GB | 128MB | NA | NA | NA |
| | TE0808-04-09EG-1EL | 9eg_1e_4gb | REV04 | 4GB | 128MB | NA | 1 mm connectors |
| | TE0808-04-09EG-2IE | 9eg_2i_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-15EG-1EE | 15eg_1e_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-06EG-1EE | 6eg_1e_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-06EG-1E3 | 6eg_1e_4gb | REV04 | 4GB | 128MB | NA | 1 mm connectors |
| | TE0808-04-6GI21-L | 6eg_2i_4gb | REV04 | 4GB | 128MB | NA | 1 mm connectors |
| | TE0808-04-6GI21-A | 6eg_2i_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-6BI21-A | 6eg_1i_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-9GI21-A | 9eg_2i_4gb | REV04 | 4GB | 128MB | NA | NA |
| | TE0808-04-9BE21-A | 9eg_1e_4gb | REV04 | 4GB | 128MB | NA | 1 mm connectors | NA NA |
| | TE0808-04-09EG6BE21-2IE L | 9eg6eg_2i1e_4gb | REV04 | 4GB | 128MB | NA | NA | NA 1 mm connectors |
| | TE0808-04-15EG6BE21-1EE A | 15eg6eg_1e_4gb 4gb | REV04 | 4GB | 128MB | NA | NA | NA |
| | TE0808-04-06EG9BE21-1EE L | 6eg9eg_1e_4gb | REV04 | 4GB | 128MB | NA NA | 1 mm connectors | NA |
| | TE0808-04-06EGBBE21-1E3 A | 6eg15eg_1e_4gb 4gb | REV04 | 4GB | 128MB | NA | 1 mm connectors | NA NA |
|
|
Note: Design contains also Board Part Files for TE0803+TEBF0808 configuration, this boart part files are not used for this reference design.
...
For general structure and of the reference design, see Project Delivery - Xilinx devices
Design Sources
| Scroll Title |
|---|
| anchor | Table_DS |
|---|
| title | Design sources |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Type | Location | Notes |
|---|
| Vivado | <design name>/block_design
<design name>/constraints
<design name>/ip_lib | Vivado Project will be generated by TE Scripts | | SDK/HSI | <design name>/sw_lib | Additional Software Template for SDK/HSI and apps_list.csv with settings for HSI |
|
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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.
See also:
The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality
- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter to start "Module Selection Guide"
- (optional Win OS) Generate Virtual Drive or use short directory for the reference design (for example x:\<design name>)
- Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
- S(optional for manual changes)elect correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
Note: Select correct one, see TE Board Part Files
Important: Use Board Part Files, which did not ends with *_tebf0808
- Create HDF and export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
- Generate Programming Files with HSI/SDK
- Run on Vivado TCL: TE::sw_run_hsi
Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" - (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
Note: See SDK Projects
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| Scroll Title |
|---|
| anchor | Table_dch |
|---|
| title | Document change history. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | 2*,*,3*,4* |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Date | Document Revision | Authors | Description |
|---|
| Page info |
|---|
| modified-date |
|---|
| modified-date |
|---|
| dateFormat | yyyy-MM-dd |
|---|
|
| | Page info |
|---|
| infoType | Current version |
|---|
| dateFormat | yyyy-MM-dd |
|---|
| prefix | v. |
|---|
| type | Flat |
|---|
|
| | Page info |
|---|
| infoType | Modified by |
|---|
| type | Flat |
|---|
|
| - new assembly variants
- small document style update
| | 2019-05-07 | v.22 | John Hartfiel | | | 2018-07-11 | v.21 | John Hartfiel | | | v.20 | John Hartfiel | | | 2018-02-08 | v.19 | John Hartfiel | | | 2017-12-20 | v.14 | John Hartfiel | - Design Update
- typo correction on documentation
| | 2017-11-22 | v.10 | John Hartfiel | - Update assembly versions with new Flash size
- Udate HW Table Name
- Update Design
| | 2017-11-14 | v.6 | John Hartfiel | | | -- | all | | Page info |
|---|
| infoType | Modified users |
|---|
| dateFormat | yyyy-MM-dd |
|---|
| type | Flat |
|---|
|
| -- |
|
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