Page History
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| Note |
|---|
| JTAGMODE pin 89 in B2B connector JM1 should be set low or grounded for normal operation. Set this pin high for SC CPLD update vie via JTAG interface. |
| Page break |
|---|
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Table 12: Module power rails.
Board to Board Connectors
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Bank Voltages
Bank | Schematic Name | Voltage | Voltage Range |
|---|---|---|---|
| 0 (config) | PL_1.8V | 1.8V | - |
| 44 HP | DDR_1V2 | 1.2V | HP: 1.2V to 1.8V |
| 45 HP | PL_1.8V | 1.8V | HP: 1.2V to 1.8V |
| 46 HP | DDR_1V2 | 1.2V | HP: 1.2V to 1.8V |
| 64 HR | B64_VCO | user | HR: 1.2V to 3.3V |
| 65 HR | 3.3V | 3.3V | HR: 1.2V to 3.3V |
| 66 HP | B66_VCO | user | HP: 1.2V to 1.8V |
| 67 HP | B67_VCO | user | HP: 1.2V to 1.8V |
| 68 HP | B68_VCO | user | HP: 1.2V to 1.8V |
Table 13: Module's bank voltages.
Board to Board Connectors
| Include Page | ||||
|---|---|---|---|---|
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Variants Currently In Production
| Module Variant | FPGA Chip | Temperature Range |
|---|---|---|
| TE0841-01-035-1C | XCKU035-1SFVA784C | Commercial |
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Variants Currently In Production
| Module Variant | FPGA Chip | Temperature Range |
|---|---|---|
| TE0841-01-035-1C | XCKU035-1SFVA784C | Commercial |
TE0841-01-035-1I | XCKU035-1SFVA784I | Industrial |
TE0841-01-035-2I | XCKU035-2SFVA784I | Industrial |
| TE0841-01-040-1C | XCKU040-1SFVA784C | Commercial |
| TE0841-01-040-1I | XCKU040-1SFVA784I | Industrial |
Table 1314: Module variants in production.
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Parameter | Min | Max | Units | Reference Document |
|---|---|---|---|---|
VIN supply voltage | -0.3 | 6.0 | V | EN63A0QI, TPS74401RGW datasheets. |
| 3.3VIN supply voltage | -0.1 | 3.75 | V | TPS27082, LCMXO2-256HC datasheets. |
| Supply voltage for HR I/O banks (VCCO) | -0.500 | 3.400 | V | Xilinx datasheet DS892. |
Supply voltage for HP I/O banks (VCCO) | -0.500 | 2.000 | V | Xilinx datasheet DS892. |
| I/O input voltage for HR I/O banks | -0.400 | VCCO + 0.550 | V | Xilinx datasheet DS892. |
I/O input voltage for HP I/O banks | -0.550 | VCCO + 0.550 | V | Xilinx datasheet DS892. |
| GTH and GTY transceiver reference clocks absolute input voltage (MGT_CLK0, MGT_CLK2) | -0.500 | 1.320 | V | Xilinx datasheet DS892. |
GTH and GTY transceiver receiver (RXP/RXN) and transmitter (TXP/TXN) absolute input voltage | -0.500 | 1.260 | V | Xilinx datasheet DS892. |
Storage temperature | -40 | +85 | °C | - |
Table 1415: Module absolute maximum ratings.
| Note |
|---|
| Assembly variants for higher storage temperature range are available on request. |
Recommended Operating Conditions
| Parameter | Min | Max | Units | Reference Document |
|---|---|---|---|---|
| VIN supply voltage | 3.3 | 5.5 | V | TPS82085SIL, TPS74401RGW datasheet |
| 3.3VIN supply voltage | 2.375 | 3.6 | V | LCMXO2-256HC datasheet |
| Supply voltage for HR I/O banks (VCCO) | 1.140 | 3.400 | V | Xilinx datasheet DS892 |
Supply voltage for HP I/O banks (VCCO) | 0.950 | 1.890 | V | Xilinx datasheet DS892 |
I/O input voltage | –0.200 | VCCO + 0.20 | V | Xilinx datasheet DS892 |
Table 1516: Module recommended operating conditions.
| Note |
|---|
| Assembly variants for higher storage temperature range are available on requestPlease check also Xilinx datasheet DS892 for complete list of absolute maximum and recommended operating ratings. |
Operating Temperature Ranges
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Industrial grade: -40°C to +85°C.
Extended grade: 0°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
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| Date | Revision | Notes | PCN | Documentation Link |
|---|---|---|---|---|
| 2015-12-09 | 01 | First production revision | - | TE0841-01 |
Table 1617: Hardware revision history.
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Date | Revision | Contributors | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Jan Kumann, Ali Naseri | Initial document. |
Table 1718: Document change history.
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