Page History

Overview

Zynq PS Design with Linux Example.
Refer to http://trenz.org/te0726-info for the current online version of this manual and other available documentation.

Key Features

Revision History

Release Notes and Know Issues

Requirements

Software

Requirements

Software

Hardware

Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

Design supports following carriers:

Additional HW Requirements:

Content

For general structure and of the reference design, see Project Delivery - Xilinx AMD devices

Design Sources

Additional Sources

Prebuilt

Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

Reference Design is available on:

• TE0726 "Test Board" Reference Design

Design Flow

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

• Xilinx AMD Development ToolsTools#XilinxSoftware-BasicUserGuides
• Vivado Projects - TE Reference Design
• Project Delivery.

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality

1. Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:

   Code Block
   language bash theme Midnight title _create_win_setup.cmd/_create_linux_setup.sh
   ------------------------Set design paths---------------------------- -- Run Design with: _create_win_setup -- Use Design Path: <absolute project path> -------------------------------------------------------------------- -------------------------TE Reference Design--------------------------- -------------------------------------------------------------------- -- (0) Module selection guide, project creation...prebuilt export... -- (1) Create minimum setup of CMD-Files and exit Batch -- (2) Create maximum setup of CMD-Files and exit Batch -- (3) (internal only) Dev -- (4) (internal only) Prod -- (c) Go to CMD-File Generation (Manual setup) -- (d) Go to Documentation (Web Documentation) -- (g) Install Board Files from Xilinx Board Store (beta) -- (a) Start design with unsupported Vivado Version (beta) -- (x) Exit Batch (nothing is done!) ---- Select (ex.:'0' for module selection guide):

   
   

2. Press 0 and enter to start "Module Selection Guide"
3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
   

   • (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"

     Note
     Note: Select correct one, see also Vivado Board Part Flow

     
     

5. Create hardware description file (.xsa file) for PetaLinux project and export to prebuilt folder

   Code Block
   language py theme Midnight title run on Vivado TCL (Script generates design and export files into "<project folder>\prebuilt\hardware\<short name>")
   TE::hw_build_design -export_prebuilt

   
   

   Info
   Using Vivado GUI is the same, except file export to prebuilt folder.

   
   

6. Create and configure your PetaLinux project with exported .xsa-file, see PetaLinux KICKstart
   • use TE Template from "<project folder>\os\petalinux"

   • use exported .xsa file from "<project folder>\prebuilt\hardware\<short name>" . Note: HW Export from Vivado GUI creates another path as default workspace.

   • The build images are located in the "<plnx-proj-root>/images/linux" directory

7. Configure the boot.scr file as needed, see Distro Boot with Boot.scr
8. Copy PetaLinux build image files to prebuilt folder

   • copy u-boot.elf, image.ub and boot.scr from "<plnx-proj-root>/images/linux" to prebuilt folder

     Info
     "<project folder>\prebuilt\os\petalinux\<ddr size>" or "<project folder>\prebuilt\os\petalinux\<short name>"

     
     

     Page properties
     hidden true id Comments
     This step depends on Xilinx Device/Hardware for Zynq-7000 series copy u-boot.elf, image.ub and boot.scr from "<plnx-proj-root>/images/linux" to prebuilt folder for ZynqMP copy u-boot.elf, bl31.elf, image.ub and boot.scr from "<plnx-proj-root>/images/linux" to prebuilt folder for ... ...

     
     

9. Generate Programming Files with Vitis

   Code Block
   language py theme Midnight title run on Vivado TCL (Script generates applications and bootable files, which are defined in "test_board\sw_lib\apps_list.csv")
   TE::sw_run_vitis -all TE::sw_run_vitis (optional; Start Vitis from Vivado GUI or start with TE Scripts on Vivado TCL)

   
   

   Note
   TCL scripts generate also platform project, this must be done manually in case GUI is used. See Vitis

   
   

Launch

Programming

Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging

Get prebuilt boot binaries

1. Run _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
2. Press 0 and enter to start "Module Selection Guide"
   1. Select assembly version
   2. Validate selection

   3. Select Create and open delivery binary folder

      Info
      Note: Folder "<project folder>\_binaries_<Article Name>" with subfolder "boot_<app name>" for different applications will be generated

      
      

QSPI-Boot mode

      Option for Boot.bin on QSPI Flash and image.ub and boot.scr on SD or USB.

1. Connect JTAG and power module (TE0726 can be powered via JTAG USB or external)
2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"

3. Type on Vivado TCL Console: TE::pr_program_flash -swapp u-boot

   Code Block
   language py theme Midnight title run on Vivado TCL (Script programs BOOT.bin on QSPI flash)
   TE::pr_program_flash -swapp u-boot TE::pr_program_flash -swapp hello_te0820 (optional)

   
   

   Note
   To program with Vitis/Vivado GUI, use special FSBL (fsbl_flash) on setup

   
   

4. Copy image.ub and boot.scr on SD or USB
   
   • use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
   • or use prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
   • Important: Do not copy Boot.bin on SD(is not used see SD note), only other files.
5. Insert SD-Card

SD

Xilinx Zynq devices in CLG225 package do not support SD Card boot directly from ROM bootloader. Use QSPI for primary boot and SD for secondary boot (uboot)

JTAG

Not used on this Example.

Usage

1. Prepare HW like described on section Programming
2. Connect UART USB (most cases same as JTAG)

3. Insert SD Card with image.ub

   Info
   Note: See TRM of the board, which is used.

   
   

   Tip

   Starting with Petalinux version 2020.1, the industry standard "Distro-Boot" boot flow for U-Boot was introduced, which significantly expands the possibilities of the boot process and has the primary goal of making booting much more standardised and predictable. The boot options described above describe the common boot processes for this hardware; other boot options are possible. For more information see Distro Boot with Boot.scr

   
   

4. Power On PCB

   Expand
   title boot process
   1. Zynq Boot ROM loads FSBL from QSPI into OCM, 2. FSBL init PS, programs PL using the bitstream and loads U-boot from QSPI into DDR, 3. U-boot loads Linux (image.ub) from SD/QSPI/... into DDR

   
   

   Page properties
   hidden true id Comments
   This step depends on Xilinx Device/Hardware for Zynq-7000 series 1. Zynq Boot ROM loads FSBL from SD/QSPI into OCM, 2. FSBL init the PS, programs the PL using the bitstream and loads U-boot from SD/QSPI into DDR, 3. U-boot loads Linux (image.ub) from SD/QSPI/... into DDR for ZynqMP??? 1. ZynqMP Boot ROM loads FSBL from SD/QSPI into OCM, 2. FSBL init the PS, programs the PL using the bitstream and loads PMU, ATF and U-boot from SD/QSPI into DDR, 3. U-boot loads Linux (image.ub) from SD/QSPI/... into DDR for Microblaze 1. FPGA Loads Bitfile from Flash, 2. MCS Firmware configure SI5338 and starts Microblaze, 3. SREC Bootloader from Bitfile Firmware loads U-Boot into DDR (This takes a while), 4. U-boot loads Linux from QSPI Flash into DDR for native FPGA ...

   
   

Linux

1. Open Serial Console (e.g. putty)
   
   1. Speed: 115200

   2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
      

      Info
      Win OS, see device manager, Linux OS see dmesg |grep tty (UART is *USB1)

      
      

2. Linux Console:
   

   Code Block
   language bash theme Midnight
   petalinux login: root Password: root

   
   

3. You can use Linux shell now.

   Code Block
   language bash theme Midnight
   i2cdetect -y -r 0 (check I2C 0 Bus) dmesg | grep rtc (RTC check) udhcpc (ETH0 check) lsusb (USB check)

   
   

4. Option Features
   1. Webserver to get access to Zynq
      • insert IP on web browser to start web interface
   2. init.sh scripts
      • add init.sh script on SD, content will be load automatically on startup (template included in ./misc/SD)

System Design - Vivado

Block Design

Scroll Title
anchor Figure_BD title-alignment center title Block Design

PS Interfaces

Constrains

Basic module constrains

#
# Common BITGEN related settings for TE0726
#
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]

set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]

Design specific constrain

Software Design - Vitis

For SDK project creation, follow instructions from:

Vitis

Application

Template location: ./sw_lib/sw_apps/

zynq_fsbl

TE modified 2020.2 FSBL

General:

• Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)

• Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\

• General Changes: 
  
  • Display FSBL Banner and Device ID

Module Specific:

• ---

zynq_fsbl_flash

TE modified 2020.2 FSBL

General:

• Modified Files: main.c
• General Changes:
  
  •  Display FSBL Banner
  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

hello_te0726

Hello TE0726 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Software Design -  PetaLinux

For PetaLinux installation and  project creation, follow instructions from:

• PetaLinux KICKstart

Config

Start with petalinux-config or petalinux-config --get-hw-description

Changes:

For 512MB variant:

• No changes

For 64MB variant only:

• CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT = y
• CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x2000000

For 128MB variant only:

• CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT = y
• CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x4000000

U-Boot

Start with petalinux-config -c u-boot

Changes:

• CONFIG_ENV_IS_NOWHERE=y

• # CONFIG_ENV_IS_IN_SPI_FLASH is not set

Change platform-top.h:

Device Tree

/include/ "system-conf.dtsi"
/ {
};
 
 
/* USB PHY */
 
/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};
 
&usb0 {
    dr_mode = "host";
    //dr_mode = "peripheral";
    usb-phy = <&usb_phy0>;
};
 
/* I2C1 */
 
&i2c1 {
    #address-cells = <1>;
    #size-cells = <0>;
 
    i2cmux0: i2cmux@70  {
        compatible = "nxp,pca9544";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x70>;
 
 
        i2c1@0 {
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0>;
 
            id_eeprom@50 {
                compatible = "atmel,24c32";
                reg = <0x50>;
            };
 
        };
        i2c1@1 {    // Display Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <1>;
        };
        i2c1@2 {    // HDMI Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
        };
        i2c1@3 {    // Camera Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
        };
    };
 
};

Kernel

Start with petalinux-config -c kernel

Changes:

• CONFIG_MII=y

• CONFIG_XILINX_GMII2RGMII=y

• CONFIG_USB_USBNET=y

• CONFIG_USB_NET_

  SMSC95XX

  AX8817X=y

• CONFIG_USB_NET_

  USBIP

  AX88179_

  CORE

Rootfs

• 178A=y

• CONFIG_USB_NET_CDCETHER=y

• # CONFIG_USB_NET_CDC_EEM is not set

• CONFIG_USB_NET_CDC_NCM=y

• # CONFIG_USB_NET_HUAWEI_CDC_NCM is not set

• # CONFIG_USB_NET_CDC_MBIM is not set

• # CONFIG_USB_NET_DM9601 is not set

• # CONFIG_USB_NET_SR9700 is not set

• # CONFIG_USB_NET_SR9800 is not set

• # CONFIG_USB_NET_SMSC75XX is not set

• CONFIG_USB_NET_SMSC95XX=y

• # CONFIG_USB_NET_GL620A is not set

• CONFIG_USB_NET_NET1080=y

• # CONFIG_USB_NET_PLUSB is not set

• # CONFIG_USB_NET_MCS7830 is not set

• # CONFIG_USB_NET_RNDIS_HOST is not set

• CONFIG_USB_NET_CDC_SUBSET_ENABLE=y

• CONFIG_USB_NET_CDC_SUBSET=y

• # CONFIG_USB_ALI_M5632 is not set

• # CONFIG_USB_AN2720 is not set

• CONFIG_USB_BELKIN=y

• CONFIG_USB_ARMLINUX=y

• # CONFIG_USB_EPSON2888 is not set

• # CONFIG_USB_KC2190 is not set

• CONFIG_USB_NET_ZAURUS=y

• # CONFIG_USB_NET_CX82310_ETH is not set

• # CONFIG_USB_NET_KALMIA is not set

• # CONFIG_USB_NET_QMI_WWAN is not set

• # CONFIG_USB_NET_INT51X1 is not set

• # CONFIG_USB_SIERRA_NET is not set

• # CONFIG_USB_VL600 is not set

• # CONFIG_USB_NET_CH9200 is not set

• # CONFIG_USB_NET_AQC111 is not set

• CONFIG_USBIP_CORE=y

• # CONFIG_USBIP_VHCI_HCD is not set

• # CONFIG_USBIP_HOST is not set

• # CONFIG_USBIP_VUDC is not set

• # CONFIG_USBIP_DEBUG is not set
  
  

Change linux-xlnx_%.bbappend:

FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"

SRC_URI += "file://devtool-fragment.cfg \
            file://0001-QSPI-s25fl127_8-2020_2.patch \
            "

• Add 0001-QSPI-s25fl127_8-2020_2.patch to "<project folder>\project-spec\meta-user\recipes-kernel\linux\linux-xlnx\"

Rootfs

Start with petalinux-config -c rootfs

Changes:

• CONFIG_i2c-tools=y
• CONFIG_busybox-httpd=y (for web server app)
• CONFIG_packagegroup-petalinux-utils = y
• CONFIG_util-linux-umount=y
• CONFIG_util-linux-mount=y

Applications

startup

Script App to load init.sh from SD Card if available.

See: \os\petalinux\project-spec\meta-user\recipes-apps\startup\files

webfwu

Webserver application accemble for Zynq access. Need busybox-httpd

Additional Software

No additional software is needed

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