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Excerpt
  • QSPI
  • SDK
  • Custom Carrier (
with other MIO settings as TEBF0808)
  • minimum PS Design with available module components only)
  • Special FSBL for QSPI Programming


Revision History

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20171114220171114115524220171114115511
DateVivadoProject BuiltAuthorsDescription
2018-01-182017.24TE0807-test_board_noprebuilt-vivado_2017.4-build_05_20180118152119.zip
TE0807-test_board-vivado_2017.
4-build_05_20180118152104.zipJohn Hartfielinitial release

Release Notes and Know Issues

  • rework Board Part Files

2017-11-14

2017.2TE0807-test_board_noprebuilt-vivado_2017.2-build_05_20171114115524.zip
TE0807-test_board-vivado_2017.2-build_05_20171114115511.zip
John Hartfiel
  • initial release

Release Notes and Know Issues

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SoftwareVersionNote
Vivado2017.24needed
SDK2017.24needed

Hardware

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Hardware Support
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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TE0807-01-ES2 es2REV012GB64MB
 

Note: Design contains also Board Part Files for TE0803TE0807+TEBF0808 configuration, this boart part files are not used for this reference design.

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Reference Design is available on:

Design Flow

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  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
               Important: Use Board Part Files, which did not contains ends with *_tebf0808
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects

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Example:
Connect JTAG and power on PCB
(if not done) Select 
correct device and Xilinx install path on "design_basic_settings.cmd" 
and create Vivado project with "vivado_create_project_guimode.cmd" or 
open with "vivado_open_project_guimode.cmd", if generated.
Type on Vivado Console: TE::pr_program_flash_mcsfile -swapp u-boot
Note: Alternative use SDK or setup Flash on Vivado manually
Reboot (if not done automatically)

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  1. Select JTAG as Boot Mode (see Carrier Description and ZynqMP TRM)
  2. Connect JTAG to Host PC
  3. Power OnConnect JTAG and power on carrier with module
  4. Open Vivado Hardware Manager with Auto Connect
  5. Right Click to FPGA Device XCU... and select Add Configuration Memory Device
    1. Select correct Flash Typ (see schematics or FPGAFLASHTYP on test_board/board_files/TE0808_board_files.csv)
  6. Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  7. Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp hello_te0807
    Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setupOpen Program Configuration Memory Device
  8. Configuration file: test_board/prebuilt/boot_image/<short dir>/hello_te0803/Boot.bin
  9. Zynq FSBL: test_board/prebuilt/software/<short dir>/zynqmp_fsbl.elf
  10. Program Device Flash

Use SDK instead of Vivado is also possible, see: SDK Projects#Xilinx%22HelloWorld%22onZynqMP


SD

This does not work, because SD controller is not selected on PS.

JTAG

Load configuration and Application with SDK Debugger into device, see:

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TypeNote
DDR
QSPIMIO
UART0MIO, please select other one, if you have connected uart to second controller or other MIO
SWDT0..1
TTC0..3

Constrains

Basic module constrains

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For SDK project creation, follow instructions from:

SDK Projects

Application

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zynqmp_fsbl

Xilinx default FSBL

zynqmp_fsbl_flash

TE modified 2017.4 FSBL

Changes:

  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

Hello

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TE0807

Hello TE0803 TE0807 is a Xilinx Hello World example as endless loop instead of one console output.

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DateDocument RevisionAuthorsDescription

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  • Release 2017.4
2017-11-14v.3John HartfielRelease 2017.2
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