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changes.mady.by.user John Hartfiel

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Power Rail Name on B2B ConnectorJM1 PinsJM2 PinsDirectionNotes
VIN

1, 3, 5

2, 4, 6, 8InputSupply voltage from the carrier board.
3.3V-10, 12OutputInternal 3.3V voltage level.
3.3VIN13, 15, 91-InputSupply voltage from the carrier board.
VCCO_64-7, 9InputHigh performance I/O bank voltage.
VCCO_65-5InputHigh performance I/O bank voltage.
VCCO_669, 11-InputHigh performance I/O bank voltage.

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Date

Revision

Contributors

Description

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modified-date
modified-date
dateFormatyyyy-MM-dd



John Hartfiel
  • Correction Power Rail Section
2017-11-20v.51John Hartfiel
  • Correction Default MIO Configuration Table
2017-11-10v.50John Hartfiel
  • Replace B2B connector section
2017-10-18v.49John Hartfiel
  • add eMMC section
2017-09-25v.48John Hartfiel
  • Correction in the "Board to Board (B2B) I/Os" section
  • Update in the "Variants Currently In Production" section
2017-09-18v.47John Hartfiel
  • Update PS MIO table
2017-08-30v.46Jan Kumann
  • MGT lanes section added.

2017-08-24

v.36

John Hartfiel
  • Correction in the  "Key Features" section.
2017-08-21v.34John Hartfiel
  • "Initial delivery state" section updated.
2017-08-21v.33Jan Kumann
  • HW revision 02 block diagram added.
  • Power distribution and power-on sequence diagram added.
  • System Controller CPLD and DDR4 SDRAM sections added.
  • TRM update to the template revision 1.6
  • Weight section removed.
  • Few minor corrections.

 

2017-08-18

v.7

John Hartfiel
  • Style changes
  • Updated "Boot Mode", "HW Revision History", "Variants Currently In Production" sections
  • Correction of MIO SD Pin-out, System Controller chapter
  • Update and new sub-sections on "On Board Peripherals and Interfaces" sections

2017-08-07

v.5

Jan Kumann

Initial version.

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