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- Single 24V main power supply
- Motherboard fitted to dedicated enclosure from Trenz ??
- 2x USB3 .0 A Connector (Superspeed Host Port (Highspeed at USB2.0))
- Gigabit Ethernet RGMII PHY with RJ45 MegJack
- Dual SFP+ Connector (2x1 Cage)
- DDR4-SDRAM SODIMM socket (64bit bus width)
- SSD (Solid State Disk) Connector
- CAN FD Transceiver (10 Pin IDC connector and 6-pin header)
- 1x DisplayPort
- 4x On-board configuration EEPROMs (1x Microchip 24LC128-I/ST, 3x Microchip 24AA025E48T-I/OT)
- All carrier board peripherals' I²C interfaces muxed to MPSoC's I²C interface
- 6x FMC HPC Connectors
- 6x FMC Fans
- 3x Optional 4-wire PWM fan connectors
- 10 output programmable PLL clock generator Si5345A
- Quad programmable PLL clock generator SI5338A
- 1x SMA coaxial connectors for reference clock signal input
- MicroSD-Socket (bootable)
- 32 Gbit (4 GByte) on-board eMMC flash (8 banks a 4 Gbit)
- System Controller CPLD Lattice MachXO2 7000 HC
- 2x JTAG/UART header ('XMOD FTDI JTAG Adapter'-compatible) for programming MPSoC and SC CPLD
- On-board DC-DC PowerSoCs and LDOs
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On the TEB0911 board two USB3 .0 Superspeed ports are available to the user, which are downward compatible to USB2 .0 Highspeed.
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Figure X: USB3 Interface
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The 4-port USB3 hub is connected to the Zynq MPSoC's PS GTR bank, the USB2 PHY is connected to the PS MIO bank 502:
| IC | Interface | Signal Schematic Names | Connected to | Note |
|---|---|---|---|---|
| USB3 Hub U4 | USB3 Upstream MGT lane | B505_TX1_N, B505_RX1_N, | PS GTR bank 505 Pins: PS_MGTRRXP1_505, AA31, | - |
| USB2 Uptream data LVDS pair | USB0_D_P USB0_D_N | USB2 PHY U15 Pins: 18,19 | - | |
| USB3 Downstream lane | USB3_RXDN1_D_P, USB3_TXDN1_D_P, USB3_RXDN2_D_P, USB3_TXDN2_D_P, | 2-port USB3 A / RJ-45 connector | ||
| USB2 Downstream LVDS pair | USB2_DN1_D_P, USB2_DN2_D_P, | 2-port USB3 A / RJ-45 connector | ||
| I²C | USBH_SDA, USBH_SCL | Configuration EEPROM U5, 8-channel I²C-switch U37 | EEPROM U5 is configuration and parameter memory of USB3 hub U4. | |
| Control Lines | USBH_MODE0, USBH_MODE1, USBH_RST | SC CPLD, Bank 2 Pins: Y17, Y16, Y15 | - | |
| USB2 PHY U15 | USB2 ULPI | USB0_STP, | PS bank 502 Pins: MIO52 ... MIO63 | - |
| USB2 data LVDS pair | USB0_D_P | USB3 Hub U4 Pins: 71,72 | - | |
| Control Lines | USB0_RST | SC CPLD, Bank 4 Pins: M2 | - |
Table 36: USB3 interface signals ans interfaces
SFP+ Interface
The TEB0911 board provides the high speed MGT interface connectors "SFP+" (Enhanced small form-factor pluggable) with data transmission rates up to 10 Gbit/s.
Block diagram below shows the dependencies between the implied devices which establish the SFP+ interface:
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Figure X: SFP+ Interface
| Connector | Interface | Signal Schematic Name | Connected to | FPGA Direction | Notes |
|---|---|---|---|---|---|
SFP+ Connector J9A | MGT Lane | B129_TX3_N, B129_RX3_N, | PS_1V8 | ||
| XMOD2_B | SC CPLD Bank 5, Pin K6 | ||||
| XMOD2_E | SC CPLD Bank 5, Pin H7 | ||||
| XMOD2_G | SC CPLD Bank 5, Pin H6 | ||||
| I²C | |||||
| Control Lines | |||||
SFP+ Connector J9B | MGT Lane | B129_TX2_N, B129_RX2_N, | 3V3SB | ||
| XMOD1_B | SC CPLD Bank 0, Pin A17 | ||||
| XMOD1_E | SC CPLD Bank 0, Pin C17 | ||||
| XMOD1_G | SC CPLD Bank 0, Pin A18 | ||||
| I²C | |||||
| Control Lines |
| Signal Schematic Name | Connector Type | FPGA Direction | Description | Logic |
|---|---|---|---|---|
| SFPx_TX_DISABLE | SFP+ | Output | SFP Enabled / Disabled | Low active |
| SFPx_LOS | SFP+ | Input | Loss of receiver signal | High active |
| SFPx_RS0 | SFP+ | Output | Full RX bandwidth | Low active |
| SFPx_RS1 | SFP+ | Output | Reduced RX bandwidth | Low active |
| SFPx_M-DEF0 | SFP+ | Input | Module present / not present | Low active |
| SFPx_TX_FAULT | SFP+ | Input | Fault / Normal Operation | High active |
| SFPx_I²C | SFP+ | BiDir | 2-wire Serial Interface | - |
| FFx_MPRS | FireFly | Output | depending on connected module | - |
| FFx_MSEL | FireFly | Outpute | depending on connected module | - |
| FFx_INTL | FireFly | Input | Module interrupt line | - |
| FFx_RSTL | FireFly | Output | Module reset line | - |
| FFx_I²C | FireFly | BiDir | 2-wire Serial Interface | - |
SSD Interface
DisplayPort Interface
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