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draw.io Diagram | ||||||||||||||||||||||||
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Figure X: SFP+ Interface
Connector | Interface | Signal Schematic Name | Connected to | FPGA Direction | Notes |
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SFP+ Connector J9A | MGT Lane | B129_TX3_N, B129_RX3_N, | PS_1V8 | ||
XMOD2_B | SC CPLD Bank 5, Pin K6 | ||||
XMOD2_E | SC CPLD Bank 5, Pin H7 | ||||
XMOD2_G | SC CPLD Bank 5, Pin H6 | ||||
I²C | |||||
Control Lines | |||||
SFP+ Connector J9B | MGT Lane | B129_TX2_N, B129_RX2_N, | 3V3SB | ||
XMOD1_B | SC CPLD Bank 0, Pin A17 | ||||
XMOD1_E | SC CPLD Bank 0, Pin C17 | ||||
XMOD1_G | SC CPLD Bank 0, Pin A18 | ||||
I²C | |||||
Control Lines |
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