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Table of Contents

Table of Contents

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Figure 2: 4 x 5 SoM carrier board TE0701-06.

 


  1. HDMI connector (1.4 HEAC support)
  2. Micro-USB connector (device, host or OTG modes)

  3. Pmod connector for access to Zynq module's PL IO-bank pins (4 LVDS pairs, max. VCCIO voltage: VIOTA)

  4. Pmod connector for access to Zynq module's PL IO-bank pins (4 LVDS pairs, max. VCCIO voltage: FMC_VADJ)
  5. User push-button S2 ("RESTART" button by default)
  6. User push-button S1 ("RESET" button by default)
  7. User LEDs (function mapping depends on firmware of System Controller CPLD)
  8. Mini-USB connector (USB JTAG and UART interface)
  9. User 4-bit DIP switch
  10. VITA 57.1 compliant FMC LPC connector with digitally programmable FMC VADJ power supply
  11. Barrel jack for 12V power supply
  12. ARM JTAG connector (DS-5 D-Stream) - PJTAG to EMIO multiplexing needed
  13. User 4-bit DIP switch (to adjust voltage of FMC_VADJ)
  14. Pmod connector (J1, max. VCCIO voltage: 3.3V): mapped to 8 Zynq PS MIO0 bank pins (MIO0, MIO9 to MIO15), 6 pins (MIO10 to MIO15) are additionally connected to TE0701 System Controller CPLD
  15. RJ45 Gigabit Ethernet connector
  16. SD Card connector, Zynq SDIO0 controller, can be used to boot system
  17. Pmod connector (J2, max. VCCIO voltage: 3.3V): 6 pins (PX0 to PX5) can be multiplexed by Texas Instruments TXS02612RTWR SDIO Port Expander to MIO pins of Zynq module, 2 pins are connected to TE0701 System Controller CPLD (PX6 and PX7)
  18. Jumper J18
  19. Mini Camera Link connector
  20. Battery holder for CR1220 (RTC backup voltage)
  21. Trenz Electronic 4 x 5 modules high-speed connector strips (3x Samtec LSHM series connectors)
  22. Jumper J16, J17, J21
  23. Jumper J9, J19, J20

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The baseboard supply voltages for the PL IO-banks of the SoM are selectable by the jumpers J16, J17 and J21. The DIP-switch S4 sets the adjustable baseboard supply-voltage FMC_VADJ.


 

Note

There is also option to select fixed voltage of FMC_VADJ with DIP-switch S4. In this case there is no need to configure the 8-bit control register of the I2C-to-GPIO-module of the System Controller CPLD.

Switch S4 is also routed to the System Controller CPLD, hence the VCCIO configuration can be registered by the CPLD. Switch S4-4 is not dedicated for FMC_VADJ setting, the function of this switch depends on the System Controller CPLD firmware.

Table 3 below describes switch S4 settings for different FMC_VADJ voltages.

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There are two baseboard supply voltages VIOTA and VIOTB connected to the 4 x 5 SoM's PL IO-bank. The supply-voltages have following pin assignments on B2B-connectors:

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Table 4: Baseboard supply-voltages VIOTA and VIOTB

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Following table describes how to configure the baseboard supply voltages with jumpers.

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Baseboard supply voltages

vs voltage levels

VIOTAVIOTBUSB-VBUS12V0_CL
3V3J17:1-2, 3 & J16: openJ17: 1-2, 3 & J16: open & J21:1-2, 3--
2V5J17:1, 2-3 & J16: openJ17:1, 2-3 & J16: open & J21: 1-2, 3--
FMC_VADJJ17: open & J16: 1-2J21:1, 2-3--
5V0 intern--

J9:1-2, 3 & J19: 1-2

(J20: 1-2: additional decoupling-capacitor 100 µF)

-
VBUS extern--J9: 1, 2-3 & J19: open-
12V_LC---J18: 1-2

Table 5: Configuration of baseboard supply-voltages via jumpers. 'Jx: 1-2, 3' means pins 1 and 2 are closed, pin 3 is open. 'Jx: 1, 2-3' means pins 2 and 3 are closed, pin 1 is open.

 



Figure 4: VCCIO jumper pin location (PCB-REV06), top view.

 


Note

Take care of the VCCO voltage ranges of the  particular PL IO-banks (HR, HP) of the mounted SoM, otherwise damages may occur to the FPGA. Therefore, refer to the TRM of the mounted SoM to get the specific information of the voltage ranges.

It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4 x 5 module to avoid failures and damages to the functionality of the mounted SoM.

Board to Board Connectors

Include Page
4 x 5 SoM LSHM B2B Connectors
4 x 5 SoM LSHM B2B Connectors

Technical Specifications

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DateRevisionAuthorsDescription

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd

John Hartfiel
  • Dual PMOD note
2017-11-09v.60John Hartfiel
  • add B2B connector section
2017-08-15

v.59

John Hartfiel
  • Add VCCIO Jumper Pin location.
  • Updated VADJ description.
2017-08-14v.58John Hartfiel
  • Description correction.
2017-05-25v.56Jan Kumann
  • New physical dimensions drawing of the board.
2017-05-16

v.51

Jan Kumann
  • A few overall improvements and corrections, new  block diagram.
2017-04-11

 


Ali Naseri
  • added block diagram
2017-02-15

v.45

Ali Naseri
  • added warning concerning the use of FTDI tools
2017-02-15v.40Ali Naseri
  • added power-on sequence diagram
2017-01-19

v.35

Ali Naseri
  • correction of table 3 (switch-positions to adjust FMC_VADJ)
  • inserted hint to set and measure the PL IO-bank supply-voltages
2017-01-13

v.20

Ali Naseri
  • added section for baseboard supply voltage configuration
2016-11-29
v.10

 


Ali Naseri
  • TRM update due to new revision 06 of
  • the carrier board.
2016-11-28v.4

Ali Naseri

  • TRM adjustment to the newest
  • revision (05) of TE0701 Carrier Board.
2014-02-18
0.2
Sven-Ole Voigt
  • TE0701-03 (REV3) updated
2014-01-05

0.1

Sven-Ole Voigt
  • Initial release

 AllSven-Ole Voigt, Ali Naseri 

Hardware Revision History

 
DateRevision

Notes

PCNDocumentation link
-06

Additional Jumper J16 and switch S4

for setting VCCIO FMC_VADJ.

PCN-20161128

TE0701

-05Improved manufacturing 
TRM-TE0701-05
-04  


-03Changed DC/DC converters  

-02Prototype  

-

01

Prototype

  





Figure 5: Hardware revision number.

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