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The PL IO-bank supply voltage FMC_VADJ will be available after the output of the 5.0V DC-DC converter is active and the pin EN_FMC of the System Controller CPLD is asserted.
Figure 3: TE0701-06 power-up sequence diagram.
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There are two baseboard supply voltages VIOTA and VIOTB connected to the 4 x 5 SoM's PL IO-bank. The supply-voltages have following pin assignments on B2B-connectors:
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Table 4: Baseboard supply-voltages VIOTA and VIOTB
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