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Additional assembly options are available for cost or performance optimization upon request.

Block Diagramm

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Main Components

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A felxible data rate CAN Transceiver is provided by a Microchip MCP2542FDT.

PHY PinPL bank 34B2BNotes
TX/RXIO_L1P/IO_L1N-
CAN_L / CAN_H-J1-1 / J1-3

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On-board I2C devices are connected to PS MIO28 (SCL) and MIO29 (SDA). I2C addresses for on-board devices are listed in the table below:

I2C Device7bit I2C AddressNotes
MAC EEPROM, U2310100110x531.8V
USER EEPROM, U1010100000x501.8V
Power Management U4 0x58 /  0x593.3V
J1
J1-142 SDA, J1-144 SDL at 3.3V

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Power Management IC

The System Controller CPLD (U2Power Management IC (U4) is provided by Lattice Semiconductor LCMXO2-256HC (MachXO2 Product Family). The  SC-CPLD is the central system management unit where essential control signals are logically linked by the implemented logic in CPLD firmware, which generates output signals to control the system, the on-board peripherals and the interfaces. Interfaces like JTAG and I2C between the on-board peripherals and to the FPGA module are by-passed, forwarded and controlled by the System Controller CPLD.

Other tasks of the System Controller CPLD are the monitoring of the power-on sequence and to display the programming state of the FPGA module.

For detailed information, refer to the reference page of the SC CPLD firmware of this moduledialog Semiconductors (DA9062). It controls the power-on sequencing of the various power rails. It is preprogrammed and accessible via I2C address 0x58 /  0x59.

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The on-board voltages of the TE07xx TE0724 SoC module will be powered-up in order of a determined sequence after the external voltages '...', '...' and '...' are available. All those power-rails can be powered up, with 3.3V power sources, also shared. <-- What?

Warning
To avoid any damage to the module, check for stabilized on-board voltages should be carried out (i.e. power good and enable signals) before powering up any SoC's I/O bank voltages VCCO_x. All I/Os should be tri-stated during power-on sequence.

Power Distribution Dependencies

Regulator dependencies and max. current.

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Figure : Module power distribution diagram.

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