Page History

...

Refer to http://trenz.org/teb0911-info for the current online version of this manual and other available documentation.

Key Features

• UltraScale+ MPSoC
  • ZU6,ZU9 or ZU15 on 1156 Pin Package
• 64bit DDR4 SODIMM (PS connected)
• M2 PCIe SSD (1-Lane)
• eMMC (bootable)
• Dual QSPI Flash (bootable)
• System Controller(LCMXO2-7000HC)
  • Power Sequencing
  • IO Expander
• Configurable PLLs
• GTH/GTP Reference CLKs

Front Panel

• 4 x FMC
  • 4 GTH per FMC
  • 68 ZynqMP PL IO per FMC
• DisplayPort (2-Lanes)
• RJ34 ETH + Dual USB3 Combo
• Dual Stack SFP+
• SD (bootable)
• Status LEDs

Back Panel

• 2 x FMC
  • 4/2 GTH
  • 12/8 ZynqMP PL IO
  • 56/60 SC IO
• USB JTAG/UART ZynqMP
• USB JTAG/GPIO FMC
• CAN FD (DB9 Connector)
• SMA (external CLK)
• 5polig 24V power connector
• Single 24V main power supply 
• 2x USB3 A Connector (Superspeed Host Port (Highspeed in USB2 mode))
• Gigabit Ethernet RGMII PHY with RJ45 MegJack
• Dual SFP+ Connector (2x1 Cage)
• DDR4-SDRAM SO-DIMM socket (64bit bus width)
• SSD (Solid State Disk) PCIe connector
• CAN FD interface (D-SUB 9-pin male connector and 6-pin header)
• DisplayPort (2 lanes)
• 4x On-board configuration EEPROMs (1x Microchip 24LC128-I/ST, 3x  Microchip 24AA025E48T-I/OT)
• All carrier board peripherals' I²C interfaces muxed to MPSoC's I²C interface
• 6x FMC connectors
• 6x FMC Fans
• 3x  4-wire PWM fan connectors
• 10 output programmable PLL clock generator Si5345A
• Quad programmable PLL clock generator SI5338A
• 1x SMA coaxial connector for reference clock signal input
• SD Card socket (bootable)
• 32 Gbit (4 GByte) on-board eMMC flash (8 banks a 4 Gbit)
• System Controller CPLD Lattice MachXO2 7000 HC
• 2x XMOD header for programming MPSoC and SC CPLD
• On-board DC-DC PowerSoCs and LDOs

Additional assembly options are available for cost or performance optimization upon request.

...