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DateVivadoProject BuiltAuthorsDescription
2018-07-112018.2te0726-test_board_noprebuilt-vivado_2018.2-build_02_20180711113737.zip
te0726-test_board-vivado_2018.2-build_02_20180711113722.zip
John Hartfiel
  • change note for REV01
  • no design changes
2018-02-172017.4te0726-test_board-vivado_2017.4-build_08_20180517084735.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_08_20180517084604.zip
John Hartfiel
  • correction netboot offset for 128MB variant
2018-02-162017.4te0726-test_board-vivado_2017.4-build_06_20180216205357.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_06_20180216205410.zip
John Hartfiel
  • correction PS REFCLK for 01 variant
2018-01-312017.4te0726-test_board-vivado_2017.4-build_05_20180131115412.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_05_20180131115451.zip
John Hartfiel
  • initial release 2017.4

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SoftwareVersionNote
Vivado20172018.42needed
SDK20172018.42needed
PetaLinux20172018.42needed

Hardware

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Hardware Support
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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
te0726-01 01 REV01128MB 64MB LPDDR216MB

te0726-03r r REV02, REV03128MB DDR3L16MB

te0726-03m m REV02, REV03512MB DDR3L16MB

te0726-03-07s-1c7sREV03512MB DDR3L16MB

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Reference Design is available on:

Design Flow

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  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported HDF
    1. HDF is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
        Note: run init_config.sh before you start petalinux config. This will set correct temporary path variable.
      2. For 128MB and 64MB only:Netboot Offset must be reduced manually, see Config
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\default" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\default"
  8. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects
Note

Since Vivado 2017.4 FSBL is needed to program QSPI. (2017.2 works without FSBL). Xilinx mini-uboot starts with this FSBL configuration but needs QSPI FB CLK enabled on PS. On TE0726, this MIO is used for UART, so special design is need to generate this FSBL.

This reference design contains a prebuilt FSBL for QSPI programming (zynqmp_fsbl_flash), so there is normally no need to regenerate this special FSBL. In case of generate this by yourself following steps are needed

  1. Create new default reference design
    1. Open PS and enable QSPI FB CLK
    2. Set UART to MIO 52 .. 53
    3. Create Bitfile
    4. Start SDK with with TE Scripts on Vivado TCL: TE::sw_run_sdk
  2. ON SDK use zynqmp_fsbl_flash template.
    Important "zynqmp_fsbl_flash" FSBL can be only used on QSPI Flash Programming setup on Vivado or SDK Menu!

Launch

Programming

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Launch

Programming

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Note
Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

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  1. Connect JTAG and power on carrier with module
  2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  3. Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp u-boot
    Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setupsetup
             optional "TE::pr_program_flash_binfile -swapp hello_te0726" possible
  4. Copy image.ub on SD-Card
    • For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
  5. Insert SD-Card

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For SDK project creation, follow instructions from:

SDK Projects

Application

SDK template in ./sw_lib/sw_apps/ available.

zynqmp_fsbl

Xilinx default FSBL

zynqmp_fsbl_flash

TE modified 20172018.4 2 FSBL

Changes:

  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

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u-

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booz

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.


hello_te0726

Hello TE0726

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is a Xilinx Hello World App in example as endless loop instead of one console output.


Software Design -  PetaLinux

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Config

For 64MB variant only:

  • CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x2000000

For 128MB variant only:

  • CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x4000000

U-Boot

No changes.

Device Tree

Code Block
languagejs
/include/ "system-conf.dtsi"
/ {
};


/* USB PHY */

/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};

&usb0 {
    dr_mode = "host";
    //dr_mode = "peripheral";
    usb-phy = <&usb_phy0>;
};

/* I2C1 */

&i2c1 {
    #address-cells = <1>;
    #size-cells = <0>;

    i2cmux0: i2cmux@70  {
        compatible = "nxp,pca9544";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x70>;


        i2c1@0 {
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0>;

            id_eeprom@50 {
                compatible = "atmel,24c32";
                reg = <0x50>;
            };

        };
        i2c1@1 {    // Display Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <1>;
        };
        i2c1@2 {    // HDMI Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
        };
        i2c1@3 {    // Camera Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
        };
    };

};

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DateDocument RevisionAuthorsDescription

Page info
infoTypeModified date
dateFormatyyyy-MM-dd
typeFlat

Page info
current-version
current-version
prefixv.



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modified-user
modified-user

  • 2018.2 release

v.9John Hartfiel
  • bugfix design for 128MB variant

v.8John Hartfiel
  • Link update
  • remove typo
2018-02-16v.6John Hartfiel
  • Design update
2018-02-09v.5John Hartfiel
  • 2017.4 release
2018-01-31v.1

Page info
created-user
created-user

  • Initial release

All

Page info
modified-users
modified-users


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